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What I Didn’t Know about Electronic Design Automation

What I Didn’t Know about Electronic Design Automation
by Daniel Payne on 03-04-2014 at 7:36 pm

I started using internal EDA tools at Intel beginning in 1978 and have worked in the commercial EDA industry since 1986, so it was a delight to read a chapter about EDA in Nenni and McLellan’s newest book: Fabless – The Transformation of the Semiconductor Industry. Starting in the 1970’s the authors talk about EDA, Phase One and how painfully manual the whole process of designing an Integrated Circuit was. I’ll never forget working at Intel at the time and performing manual Design Rule Checks (DRC) on an IC layout, when I stopped to ask my manager, “Hey, what about using a software program to automate this tedious task?”

His hasty response was, “No way, we hire you new college graduates to do this grunt work, so get back to work and stop asking questions.”

All of the pioneering EDA companies are included in this chapter, and it reminds me of the EDA wiki page that we created to list every single EDA merger and acquisition, except in the book we have the behind-the-scenes story of the rise and fall of each EDA company and some of the luminaries that founded the companies.

By the 1980’s we reached EDA, Phase Two and the growth of commercial EDA companies took off like a rocket. I even bought the book Introduction to VLSI Systems from Mead and Conway, introducing the concept of lambda-based design, a technique used at my first EDA company – Silicon Compiler Systems. ASIC companies started up and you could design with Gate Arrays, Standard Cell or Full Custom. It was the heady days of the DMV – Daisy, Mentor, Valid.

EDA, Phase Three describes the history of Customer Owned Tooling (COT) and how Cadence got its start. Even the biggest lawsuit of all EDA history is covered by recounting the illegal activity of Avant! in their quest to compete with Cadence in the place and route business.

Logic synthesis started EDA, Phase Four and you can probably guess that Synopsys was at the forefront of that transition to an RTL-based design methodology. There were many other players at that same time with their own logic synthesis approach, yet the winning factors that made Synopsys the leading vendor are described.

Today we are experiencing EDA, Phase Five, with full-service software companies offering both point tools, sub-flows and even IP.

The final three sections of the EDA chapter have authors from the big-three talk about their unique histories: Mentor Graphics, Cadence Design Systems and Synopsys. These three public companies generate some 75% of all revenue for the industry.

Mentor Graphics

The story of how the Mentor Graphcis founders left Tektronix, created a business plan, and cobbled together their first product in time for a DAC show was inspiring. I worked at Silicon Compiler Systems and was acquired by Mentor Graphics in the 1990’s, so it was fun to see how that acquisition fit into the bigger scheme of things at Mentor. The first business model at Mentor in the early days included bundling the hardware, operating system and EDA software all together. As Sun, HP and IBM began offering workstations, we saw Mentor shift from a bundled model, to a software-only model.

Cadence Design Systems

Cadence Design Systems had a fascinating history by forming with the merger of SDA Systems and ECAD. Each new acquisition seemed to be perfectly timed under the leadership of Joe Costello. Stories of how Dracula, Verilog and Tangate got developed or acquired give an idea of how the company dominated early market segments with best-in-class point tools.


Synopsys was at first named Optimal Solutions, Inc before moving from North Carolina to California. It’s history started out humbly enough with an EDA tool that could read a Gate Array netlist, optimize it, then produce a netlist with fewer gates. It took years before language was used as an input, at first it was all gates in, and gates out. Like the other EDA companies, growth also came through strategic acquisition for tools like functional verification, ATPG and physical implementation. Both Cadence and Synopsys have made recent acquisitions into the Verification IP and IP segments.


Even if you’ve lived through the EDA industry from the 1970’s until present like me, there is a wealth of information and stories in this chapter that will keep you both entertained and informed. Remember, those that forget to study history are doomed to repeat the same mistakes.

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