A tower-like heterogeneous packaging architecture for the AI era VEMC: The Vertical System…Read More
Akeana Collaborates with Samsung Electronics, Fast-Tracking RISC-V Customers and Ecosystem for Server and Agentic AI SiliconThe momentum behind RISC-V continues to accelerate as…Read More
Agentic AI and the Future of Chip Design: From Productivity Tool to Engineering PartnerHighlights from a recent panel session moderated by…Read More
How llmda.ai Coaxed Me Out of Retirement, an Interview with Kurt ShulerArteris is one of the most impressive companies…Read More
The Memory Sector Is Becoming One of the Main Beneficiaries of the AI BoomThe explosive growth of artificial intelligence is transforming…Read More
I have been at the Linley Microprocessor Conference today. This is the one that is not about mobile: about servers, networking, base-stations. Probably the most important story about the whole industry is that the “shift to ARM becomes a stampede.”
In this market it seems to be driven by the 64-bit ARMv8 instruction… Read More
The GSA Memory+ conference Taiwan will take place on (Halloween!) October 31, 2013 at the Regent Taipei, Taiwan. The main theme of this year is highlighting Memory—the Critical Enabler for Prominent and Emerging Applications in System Logic Solutions.
GSA Memory+ Conference is the global industry event dedicated to all memory… Read More
The deadline for panel sessions, workshops, tutorials and co-located conferences for DAC 2014 is October 21st. That’s next Monday!
DAC 2014 will not only focus on EDA and embedded systems and software but
also include:
Eyal Bergman of CEVA announced their latest core yesterday at the Linley Microprocessor Conference. It’s their 4th generation CEVA-XC solution, which is the core of their offering for wireless baseband. It builds on 3 previous generations of CEVA-XC’s that were mainly targeted toward handset applications. This… Read More
Taiwan Semiconductor Manufacturing Corporation is the world’s leading semiconductor foundry by revenue and, by extension, profitability. While I am deeply saddened that current CEO Morris Chang will be retiring (again) shortly, I am hopeful that his successor will be able to continue the legacy of foundry industry leadership… Read More
Chris Rowen of Cadence’s Tensilica announced the tenth generation of the Xtensa customizable processor at the Linley Microprocessor Conference yesterday. Chris was one of the founders of Tensilica…back in 1997. I believe that the first version was released in 1999. Over the years the Tensilica business changed.… Read More
Imagine that you’re working in a CAD group and just received a new library of a few hundred IP blocks and you needed to know if these blocks conform to your design and quality standards. There are many questions about library and IP quality:
With multiple functionalities added into a single chip, be it a SoC or an ASIC, maintaining low power consumption has become critical for any design. Various techniques at the technology as well as design level are employed to accomplish the low power target. These include thinner oxides in transistors, different sections of … Read More
The GSA IP Working Group will meet today in San Jose, and the Group has asked IPnest building a presentation dedicated to Interface IP. The timing was perfect, as I have just completed the “Interface IP Survey” version 5, and I was able to use fresh market data. The IP working group will discover the IP vendor ranking, protocol by protocol,… Read More
Success in manufacturing has two conditions: tariff barriers to shield the infant industries from external competition, and a rigorous focus on exports to ensure that manufacturing cannot just shelter behind the tariff barriers and reap monopoly profits inside the country. Each industry needs to have several companies enter,… Read More
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ASML High-NA EUV is Not Ready for High-Volume Production