Accellera 2024 End of Year UpdateFrom my viewpoint, standards organizations in semiconductor design…Read More
Synopsys Brings Multi-Die Integration Closer with its 3DIO IP Solution and 3DIC ToolsThere is ample evidence that technologies such as…Read More
Enhancing System Reliability with Digital Twins and Silicon Lifecycle Management (SLM)As industries become more reliant on advanced technologies,…Read More
Almost every SoC has multiple analog blocks so AMS methodology is an important topic to our growing electronics industry. Authored by Jess Chen (Qualcomm), Michael Henrie (Cliosoft), Monte Mar (Boeing) and Mladen Nizic (Cadence), the book is subtitled: Advanced Methodology for AMS IP and SoC Design, Verification and Implementation… Read More
Almost every SoC has multiple analog blocks so AMS methodology is an important topic to our growing electronics industry. Authored by Jess Chen (Qualcomm), Michael Henrie (Cliosoft), Monte Mar (Boeing) and Mladen Nizic (Cadence), the book is subtitled: Advanced Methodology for AMS IP and SoC Design, Verification and Implementation… Read More
Broadcom has designed an impressive SOC named the BCM2835 with the following integrated features:
The British chaps at Raspberry Pi have created a $35.00 Linux-based computer based on the Broadcom BCM2835 chip that is tiny in size but big in utility:… Read More
When I worked for virtual platform companies, one of the things that I used to tell prospective customers was that virtual prototypes were not some second-rate approach to software and hardware development to be dropped the moment real silicon was available, that in many ways they were better than the real hardware since they had… Read More
Synopsys announced their results today. With Magma rolled in (but not yet SpringSoft since that hasn’t technically closed) they had revenue of $443M up 15% from $387M last year. This means that they are all but a $1.75B company and a large part of the entire EDA industry (which I think of as being $5B or so, depending on just what… Read More
Cadence has a new white paper out about the changes in IC design that are coming at 20nm. One thing is very clear: 20nm is not simply “more of the same”. All design, from basic standard cells up to huge SoCs has several new challenges to go along with all the old ones that we had at 45nm and 28nm.
I should emphasize that the paper… Read More
In the early 1980s the ideas and infrastructure for what would eventually be called ASIC started to come together. Semiconductor technology had reached the point that a useful number of transistors could be put onto a chip. But unlike earlier, when a chip only held a few transistors and thus could be used to create basic generic building… Read More
In 1981, Pac-Man was sweeping the nation, the first space shuttle launched, and a small group of engineers in Oregon started not only a new company (Mentor Graphics), but an entirely new industry, electronic design automation (EDA).
Mentor founders Tom Bruggere, Gerry Langeler, and Dave Moffenbeier left Tektronix with a great… Read More
Economic considerations are a primary driver in determining which technology solutions will be selected, and how they will be implemented in a company’s design environment. In the process of developing Memoir’s Algorithmic Memory technology and our Renaissance product line, we have held fast to two basic premises: Our technology… Read More
I was very happy to see that Cadence has decided to hold MEMCON again in 2012, in Santa Clara on September 18[SUP]th[/SUP] . The session will start with “New Memory Technologies and Disruptions in the Ecosystem”from Martin Lund.
Martin is the recently (March this year) appointed Senior VP for the SoC Realization Group at cadence:… Read More
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Podcast EP267: The Broad Impact Weebit Nano’s ReRAM is having with Coby Hanoch