The foundry landscape is changing again and it is definitely something that should be discussed. There are some people, mostly influenced by Intel, that feel the foundry business has hit the wall at 20nm which couldn’t be further from the truth. After spending 30 years working in Silicon Valley, I have experienced a lot of change… Read More
Agentrys Launches Agentic Design Automation at DAC 2026There were many new agentic design flows introduced…Read More
NVIDIA Brings Agentic AI Toolkit to EDANVIDIA’s expansion of the NVIDIA Agent Toolkit with…Read More
Synopsys and Intel Foundry Enable System-Level Design on Intel 14ASynopsys and Intel Foundry are expanding their collaboration…Read More
DAC 2026: How Undo Makes AI for Chip Design Work BetterDAC was abuzz this year with new AI-fueled…Read More
ChipAgent Raises $134Million and Why it MattersIn my 45 years experience in the semiconductor…Read More
CDNLive World Tour
CDNLive is becoming a real worldwide event, starting in March in San Jose and ending in November in Tel Aviv, Israel.
The complete schedule is:
- March 11-12th, Santa Clara, California
- May 19th-21st, Munich, Germany
- July 15th, Seoul, Korea
- August 15th, Shanghai, China
- August 7th, Hsinchu, Taiwan
- August 11-12th, Bangalore, India
A Brief History of the Apple iPod
In January 2001 we had a new American president, George W. Bush, I was working at Mentor Graphics, and Apple introduced an MP3 player called the iPod with a hard drive capable of holding 1,000 songs. In the previous decades we enjoyed portable music from tape-based, CD, or mini-CD devices like the Sony Walkman. The first several generations… Read More
Xilinx’s Mixed Signal FPGA
Something in all the Xilinx chatter of UltraScale 20nm, 16nm, having massive amounts of Gigabit transceivers, DSP blocks, RAM, HLS, Rapid Design Closure gets lost… and that is Xilinx’s ability for Mixed Signals. I do not mean when you are talking with the wife (Remember Listen!), but a wonderful block that lives within… Read More
TSMC OIP presentations available!
Are you a TSMC customer or partner? If so, you’ll want to take a look at these presentations from the 2013 TSMC Open Innovation Platform conference:
- Design Reliability with Calibre YE-SmartFill and Calibre PERC (Broadcom & Mentor Graphics)
New methodologies were developed for 28nm designs using Calibre SmartFill and Calibre
Compositions allow NoCs to connect easier
I blame it on Henry Ford, William Levitt, and the NY State Board of Regents, among others. We went through a phase with this irresistible urge to stamp out blocks of sameness, creating mass produced clones of everything from cars to houses to students.
Thank goodness, that’s pretty much over. The thinking of simplifying system design… Read More
Simulation of Novel TFT Devices
Traditionally logic devices built on top of thin-film-transistors (TFTs) have used one type of device, either an NMOS a-Si: TFT (hydrogenated amorphous silicon) or a PMOS organic device. Recently a-Si:H and pentacene PMOS TFTs have been integrated into complementary logic structures similar to CMOS. This, in turn, creates… Read More
TSMC projects $800 Million of 2.5/3D-IC Revenues for 2016
At TSMC’s latest earnings call held mid January 2014, an analyst asked TSMC for a revenue forecast for their emerging 2.5/3D product line. C.C. Wei, President and Co-CEO answered: “800 Million Dollars in 2016 ”. TSMC has demonstrated great vision many times before. For me, an enthusiastic supporter of this technology, this statement… Read More
What will drive MEMS to drive I-o-T and I-o-P?
By I-o-P, I mean Internet-of-People- I couldn’t think of anything better than this to describe a technology which becomes your custodian for everything you do; you may consider it as your good companion through life or an invariably controlling spy. This is obvious with the embedded sensor techno-products such as Kolibree, a … Read More
SPICE Circuit Simulator Gets a Jolt
I’ve been using SPICE circuit simulators since 1978, both internally and commercially developed, and a lot has changed since the early days where netlists were simulated in batch mode on time-share mainframes. We used to wait overnight for our simulations to complete, and in the morning had to pickup our output results … Read More
ASML’s Path to Lithography Dominance—and the Coming Maskless Revolution