CAST Compression IP Webinar 800x100 (2)

Intel Lost $1B in Mobile Last Quarter

Intel Lost $1B in Mobile Last Quarter
by Paul McLellan on 04-16-2014 at 8:00 am

Intel announced their quarterly results today. Revenue was $12.8B, up 1% from a year ago with operating income of $2.5B also up 1% from last year.

Since the future of the world is mobile and not desktop/laptop, the mobile results are the most interesting. Mobile sales fell 61% to $156M. This includes mobile products and anything … Read More


Xilinx Showcases Worlds First ‘High Performance’ Analogue FPGA

Xilinx Showcases Worlds First ‘High Performance’ Analogue FPGA
by Luke Miller on 04-16-2014 at 7:00 am

Last February Xilinx presented a prototype device at the 2014 IEEE international Solid-State Circuits Conference (ISSCC, titled “A Heterogeneous 3D-IC Consisting of Two 28nm FPGA Die and 32 Reconfigurable High-Performance Data Converters” and click here to get a copy of the paper. Let me just share the intro my dear reader… … Read More


What, SD doesn’t have enough pins?

What, SD doesn’t have enough pins?
by Don Dingee on 04-16-2014 at 6:00 am

I was in a Twitter conversation over the weekend with some very smart people, and one of the discussion points was how slow and painful the formal standardization process can be. One suggestion was that IoT companies should “just do it”, creating specification-by-implementation. … Read More


Will IoT Drive the Next Semiconductor Revolution?

Will IoT Drive the Next Semiconductor Revolution?
by Daniel Nenni on 04-14-2014 at 9:00 pm

To further my quest to comprehend the latest trends in the semiconductor industry continues, I spent the morning with SEMI at the “The Silicon Valley Breakfast Forum: Internet of Things (IoT) – Driving the Microelectronics Revolution” seminar. I’m a big fan of the breakfast seminar concept. I’m up early anyway and it is … Read More


Show Me How To Get Better DRC and LVS Results For My SoC Design

Show Me How To Get Better DRC and LVS Results For My SoC Design
by Daniel Payne on 04-14-2014 at 3:30 pm

Most IC engineers learn best by hands-on experience when another more experienced person can show us what to do. If you cannot find that experienced person, then the next best thing is a video from an expert. I was surprised to find out that video was so important today that the #2 most viewed web site on the Internet was www.youtube.comRead More


Fast & Accurate Thermal Analysis of 3D-ICs

Fast & Accurate Thermal Analysis of 3D-ICs
by Pawan Fangaria on 04-14-2014 at 11:00 am

As Moore’s law started saturating on a single semiconductor die, the semiconductor community came up with the approach of growing vertically by stacking dies one above other in a 3D-IC arrangement. However, a major concern with a 3D-IC is that the heat generated by each die can get trapped in the stack, and hence it’s extremely important… Read More


A Brief History of Functional Verification

A Brief History of Functional Verification
by Paul McLellan on 04-13-2014 at 3:00 pm

Usually these brief history pieces are totally written by the SemiWiki blogger whose name is at the top. Often me since that was how I prototyped book chapters (buy). Well, OK, I did actually write this but it is completely cribbed from a presentation earlier this week by Wally Rhines who gave a sort of keynote at the announcement of… Read More


Semiconductor Meme Contest!

Semiconductor Meme Contest!
by Daniel Nenni on 04-13-2014 at 7:00 am

Hopefully we all know what memes are, if not, ask one of your children or grandchildren. Having four grown children of my own I see memes posted on my FaceBook page now and again in support of my superior parenting skills. Remember when EETimes used to run a picture and readers would send in funny captions? An early form of meme, not that… Read More


Expert Constraint Management Leads to Productivity & Faster Convergence

Expert Constraint Management Leads to Productivity & Faster Convergence
by Pawan Fangaria on 04-12-2014 at 7:30 am

The SoC designs of today are much more complex than ever in terms of number of clocks, IPs, levels of hierarchies, several modes of operations, different types of validations and checks for growing number of constraints at various stages in the design flow. As a semiconductor design evolves through several stages from RTL to layout,… Read More