There are some interesting parallels between Intel and Microsoft. Both of them missed mobile. Actually they didn’t completely miss mobile, both of them had programs from early days. But clearly they both regarded mobile as a much lower priority: the PC was where all the money was and where it would continue to be forever.… Read More
Streamlining Functional Verification for Multi-Die and Chiplet DesignsAs multi-die and chiplet-based system designs become more…Read More
S2C Advances RISC-V Ecosystem, Accelerating Innovation at 2025 Summit ChinaShanghai, July 19, 2025 — S2C, a leader in functional…Read More
A Quick Tour Through Prompt Engineering as it Might Apply to DebugThe immediate appeal of large language models (LLMs)…Read More
What XiangShan Got Right—And What It Didn’t Dare TryAn Open ISA, a Closed Mindset — Predictive…Read More
NoCs for system-level power management
Most of the buzz on network-on-chip is around simplifying and scaling interconnect, especially in multicore SoCs where AMBA buses and crossbars run into issues as more and more cores enter a design. Designers may want to explore how NoCs can help with a more power-aware approach.… Read More
Xilinx: Revenue Down, Profit Up, FinFET on Schedule
Xilinx announced their results today and had their conference call this afternoon, which I listened to. For them this is 1Q fiscal 2015 which means you have to be careful since there is a big difference between talking about fiscal quarters and calendar quarters. Xilinx’s conference calls are interesting for a couple of … Read More
The Leading Edge Foundry Landscape
There have been a lot of interesting announcements and presentations lately from the leading edge foundries. Looking at all of this information, a pretty interesting picture begins to emerge.
TSMC
TSMC is far and away the world’s largest foundry. In their 2014-Q2 conference call TSMC outlined their expectations for the balance… Read More
Moderate growth and minor correction in semiconductors
At SEMICON West two weeks ago, Bob Johnson of Gartner presented the outlook for the semiconductor market, semiconductor capital spending, and wafer fab equipment spending. Thanks to Daniel Nenni for providing the link to the SEMI/Gartner Market Symposium presentations at https://sites.google.com/a/semi.org/market-symposium/home/speaker-presentations… Read More
Improve Your Memory the Sonics Way
There is never enough memory bandwidth. Well, occasionally there is but many SoCs have lots of blocks that communicate through memory, typically off-chip DRAM. In 2001 Sonics created their first solution to this problem with MemMax technology that was incorporated into their SonicsSX product. This has been used in over 100 designs… Read More
Cadence Results: Good but Palladium under Price Pressure
Cadence announced their 2Q results this afternoon. I listened to the conference call.
You can read all the details of the results in the press release but the big picture is:
- Revenue $379K, net income $23M GAAP or $64M non-GAAP (8, 21c per share, beat estimates by 1c). Equivalent quarter last year was $362M so less than 5% increase)
Intel vs AMD
While listening to the Intel and AMD conference calls last week I was reminded of the ATI acquisition by AMD and the painfully long cultural assimilation that ensued. The title of this blog could just as easily have been “Custom vs Synthesizable Design Cultures” or “The Real Reason Why AMD is Fabless” because that is closer to how … Read More
When is a Million-Year MTBF Too Short?
The reliability metric, Mean Time Between Failures (MTBF), is often misunderstood. Use of an MTBF metric generally assumes a random failure process, one that is very infrequent and has no memory of past failures. Such failure modes can occur in System-on-Chip (SoC) designs and include radiation effects, synchronizer malfunctions… Read More
Setting the Record Straight on FD-SOI Costs
I recently published an article on Semiwiki “Is SOI Really Less Expensive”. That article was the result of months of careful research and analysis. I looked at planar FDSOI versus bulk planar, bulk FinFETs and FinFETs on SOI at three different nodes. I took a consistent set of assumptions with respect to the fab used to run the processes,… Read More
Should the US Government Invest in Intel?