Most engineers learn by doing, and so at DAC in June an EDA vendor with High Level Synthesis (HLS) tools held a language tutorial on choosing C++ or SystemC for design and verification projects. The EDA company is Calypto, and Stuart Clubb put together the tutorial on using synthesizable C++ or SystemC. The design and verification… Read More
Reachability in Analog and AMS. Innovation in VerificationCan a combination of learning-based surrogate models plus…Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural PivotIn 2003, legendary computer architect Michael J. Flynn…Read More
Enabling RISC-V & AI Innovations with Andes AX45MPV Running Live on S2C Prodigy S8-100 Prototyping SystemQualifying an AI-class RISC-V SoC demands proving that…Read More
DAC News – A New Era of Electronic Design Begins with Siemens EDA AIAI is the centerpiece of DAC this year.…Read More
Antun Domic, on Synopsys’ Secret Sauce in Design
Antun Domic is the GM of the Design Group at Synopsys. I sat down with him a couple of weeks ago.
His name is Croatian although, of course, there was no Croatia back then it was part of Yugoslavia. But in fact he grew up in Chile and went to university there where he studied EE and math. He came to the US as a grad student and did a PhD at MIT in … Read More
Cost Modeling as a Decision Making Tool
The use of simulation is well established in the semiconductor industry. Virtually all circuit designs are run through a Spice simulation, layouts are analyzed for timing issues and even process development employs process simulation tools. What I believe is less widely used but just as useful is cost modeling.
The semiconductor… Read More
GPS Chronicle: The Early History
There is really nothing new about GPS: the technology was reinvented from the old. After satellite communications was established, scientists and engineers started to look for different ways of utilizing this fascinating space marvel. Radio navigation systems had been developed during the World War II for aircraft operations,… Read More
TSMC (Apple) Update Q2 2015!
The TSMC quarterly conference call was last week and of course it stirred up quite a bit of controversy. Let me share with you my experience, observations, and opinions and maybe together we can come up with an accurate prediction for 2016. First let’s take a look at 20nm and what people now call the “Apple effect.”
Correct… Read More
Why Drones Love Atmel SAM E70
Avionics is by nature a mature market, requiring the use of validated system solution: safety is an absolute requirement, innovative systems require stringent qualification phase. That’s why the very fast adoption of drones as alternative solution for human piloted planes is impressive. It took 10 years or so for drones to be… Read More
How ARM Implemented a Mali GPU using Logic Synthesis and Place/Route Tools
ARM is a well-known semiconductor IP provider and they often create a reference design so that SoC companies can have a starting point to work with. On the GPU side of IP the ARM engineers have an architecture called Mali, and a recent webinar hosted by Synopsys reviewed how the physical design area was minimized by using a combination… Read More
GlobalFoundries 22nm FD-SOI: What Happens When
Earlier in the week I wrote about GlobalFoundries announcement of 22nm FD-SOI. At SEMICON West there were three events that filled in some more details. First, on Tuesday, a lunch presentation given by SOITEC who make the wafer blanks that FD-SOI requires. Then on Wednesday I sat down for an hour with Gary Patton and Subi Kengeri … Read More
How PowerArtist Interfaces with Emulators
Last month in DAC I could see some of the top innovations in the EDA world. EDA is a key enabler for advances in semiconductor designs. Among a number of innovations worth mentioning (about which I blogged just after DAC), the integration of Mentor’s Veloce with ANSYS’ PowerArtist for power analysis of live applications caught my… Read More
Leveraging Power Reduction Techniques for MCU Based SoCs
Dolphin Integration launched a new 32-bit microcontroller, RISC-351 Zephyr, targeting low-power SoCs for IoT-like competitive markets taking into consideration three angles for optimization of power consumption: architectural, memory and software.
Architecture Angle
As a reminder, 8-bit versus 16-bit versus 32-bit… Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot