With the growth in streaming video and the promises of 50 billion IoT gadgets making our lives oh-so-much better, there is an alarming demand for online computational horsepower and bandwidth.
Why alarming? In 2014, data centers in the United States consumed approximately 100 billion kilowatt hours (kWh) of energy. According… Read More




Qualcomm goes in Data Center thanks to Google
The Server SoC at the heart of Data Center almost don’t care about power consumption, at the opposite of Application Processors for smartphone. If you design a server multi-core SoC, you target the highest performance, in fact a combination of high frequency and lowest possible latency, and try to pack as many CPU core and embedded… Read More
Supernovae and Safety
Whenever we push the bounds of reliability in any domain, we run into new potential sources of error. Perhaps not completely new, but rather concerns new to that domain. That’s the case for Single Event Upsets (SEUs) which are radiation-triggered bit-flips, and Single Event Transients (SETs) which are radiation-triggered pulses… Read More
Pathfinding to an Optimal Chip/Package/Board Implementation
A new term has entered the vernacular of electronic design engineering — pathfinding. The complexity of the functionality to be integrated and the myriad of chip, package, and board technologies available make the implementation decision a daunting task. Pathfinding refers to the method by which the design space of technology… Read More
Here is what ‘‘Internet of Things’’ will do for Intelligent Transportation
Transportation sector is growing, and we can already see that a fleet of autonomous, shared vehicles – connected to the road infrastructure, to the Internet and to a broader network of public transit options – will create incredible value. The transport sector is trying its level best to improve the safety, reliability, and cost… Read More
Cadence Adds New Dimension to SoC Test Solution
It requires lateral thinking in bringing new innovation into conventional solutions to age-old hard problems. While the core logic design has evolved adding multiple functionalities onto a chip, now called SoC, the structural composition of DFT (Design for Testability) has remained more or less same based on XOR-based compression… Read More
Updated tool cuts through DO-254 V&V chaos
Audits. The mere mention of the word keeps project managers up at night and sends most designers running. However, in the case of FPGA designs seeking DO-254 compliance, the product doesn’t ship until the audit is complete – there is no avoiding it, or skating around it.… Read More
Parking Obsessed in 2016
There’s a $20B problem facing drivers in U.S. cities – in fact, it affects drivers in cities all over the world. It is the challenge of locating an available and legal parking space.… Read More
Expanding 3D EM Simulation Access to All
James Clerk Maxwell’s eponymous equations are the basis for simulating electromagnetic wave propagation. In school, EE majors tended to fall into two camps: (a) those that thoroughly enjoyed their fields and waves classes, who liked doing surface integrals, and who were adept at demonstrating the “right hand rule”, and (b) … Read More
Submerging the Data Center
One of NetSpeed’s customers is a Tier-1 semiconductor company that develops some of the industry’s best performing and most complex system on chips (SoC) for the data center and cloud computing markets. To keep its leadership in the data center market, the company needs to produce best-in-class SoC solutions year after year. … Read More
Musk’s new job as Samsung Fab Manager – Can he disrupt chip making? Intel outside