Bluetooth (BT) was never a bit-player in communication but what surprised me is that is already dominating the market, at least as measured by radios sold, and is likely to extend that lead over the next 5 years. Particularly impressive is that BT already leads cellular and WiFi. This strength is certainly influenced by sales into… Read More
ESD Alliance Executive Outlook Features View of How Multi-Physics is Reshaping Chip Design and EDA ToolsEvery spring, the ESD Alliance, a SEMI Technology…Read More
The Growing Importance of PVT Monitoring for Silicon Lifecycle ManagementIn an era defined by complex chip architectures,…Read More
TSMC Brings Packaging Center Stage with SiliconThe worldwide TSMC 2025 Technology Symposium recently kicked…Read More
TSMC 2025 Technical Symposium BriefingAt the pre-conference briefing, Dr. Kevin Zhang gave…Read More
SPIE Advanced Lithography and Synopsys!
SPIE is the premier event for lithography held in Silicon Valley and again Scotten Jones and I will be attending. EUV is generally the star of the show and this year will be no different now that TSMC has committed to EUV production in 2019.
Last year at SPIE, TSMC presented the history of EUV development from the beginning in 1985 as … Read More
Finding Transistor-level Defects Inside of Standard Cells
In the earliest days of IC design the engineering work was always done at the transistor-level, and then over time the abstraction level moved upward to gate-level, cell-level, RTL level, IP reuse, and high-level modeling abstractions. The higher levels of abstraction have allowed systems to be integrated into an SoC that can… Read More
Computability 2.0?
There’s muttering among computing fundamentalists that perhaps we ought to revisit the definition of computability given recent advances in methods of computing, especially machine learning and quantum computation.
Computability is about what can and cannot be computed, either by a human or non-human computer. This is a … Read More
Four Steps for Logic Synthesis in FPGA Designs
I remember meeting Ken McElvain at Silicon Compilers for the first time back in the 1980’s, he was a gifted EDA tool developer that did a lot of coding including logic synthesis, a cycle-based simulator and ATPG. Mentor Graphics acquired Silicon Compilers with Ken included, and he continued to create another logic synthesis… Read More
CEO Interview: David Dutton of Silvaco
Silvaco has undergone one of the most impressive EDA transformations so it was a pleasure to interview the man behind it. David Dutton’s 30+ year career started at Intel, Maxim, and Mattson Technology where he led the company’s turnaround and finished as President, CEO, and board member. David joined Silvaco as CEO… Read More
ISS Gary Patton Keynote: FD-SOI, FinFETS, and Beyond!
Two weeks ago the SEMI ISS Conference was held at Half Moon Bay in California. On the opening day of the conference Gary Patton CTO of GLOBALFOUNDRIES gave the keynote address and I also had the chance to sit down with Gary for an interview the next day.
SoC Integration using IP Lifecycle Management Methodology
Small EDA companies often focus on a single point tool and then gradually over time they add new, complementary tools to start creating more of a sub-flow to help you get that next SoC project out on time. The most astute EDA companies often choose to partner with other like-minded companies to create tools that work together well,… Read More
Timing Closure Complexity Mounts at FinFET Nodes
Timing closure is the perennial issue in digital IC design. While the specific problem that has needed to be solved to achieve timing closure over the decades has continuously changed, it has always been a looming problem. And the timing closure problem has gotten more severe with 16/14nm FinFET SoCs due to greater distances between… Read More
The Nannification of Tesla
I can’t tell you how many times I have sat down with executives of large companies and startups who have tried to get me excited about geo-fencing. Geo-fencing is a clever little technology that can allow a device maker to restrict access to a device, service or content when that system roams beyond a particular zone of acceptable… Read More
TSMC Describes Technology Innovation Beyond A14