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Designing a fully digitally controlled DC-DC buck converter

Designing a fully digitally controlled DC-DC buck converter
by Tom Simon on 12-31-2018 at 7:00 am

One of the unsung heroes of our digital world is the modest voltage converter. Batteries and wired power sources rarely match up with the supply needs for advanced ICs. Leading edge ICs have multiple voltage domains and very often, as in the case of processors, use dynamic voltage scaling to help conserve power. Looking at where … Read More


2019 the Year of Electrification

2019 the Year of Electrification
by Roger C. Lanctot on 12-31-2018 at 7:00 am

After two years of wrestling with and at least partially resolving fraud charges over its “defeat device” to manipulate emissions testing results, Volkswagen emerged in 2018 as the flag-bearer for electrification in the U.S. The company also concluded 2018 as the largest producer of passenger cars in the world.

In spite of or … Read More


Tackling Manufacturing Errors Early with CMP Simulation

Tackling Manufacturing Errors Early with CMP Simulation
by Alex Tan on 12-28-2018 at 12:00 pm

CMP (Chemical Mechanical Planarization or also known as Chemical Mechanical Polishing) is a wafer fabrication step applied generally after a chemical deposition –intended to smoothen and to flatten (planarize) wafer surfaces with the combination of chemical and mechanical forces. Developed at IBM and since its introduction… Read More


IEDM 2018 Imec on Interconnect Metals Beyond Copper

IEDM 2018 Imec on Interconnect Metals Beyond Copper
by Scotten Jones on 12-28-2018 at 7:00 am

At IEDM this December Imec presented “Interconnect metals beyond copper – reliability challenges and opportunities”. In addition to seeing the paper presented I had a chance to interview one of the authors, Kristof Croes. Replacements for copper are a hot subject and I will summarize the challenges and Imec’s work.… Read More


You Will Not Get Fired for Choosing RISC-V

You Will Not Get Fired for Choosing RISC-V
by Camille Kokozaki on 12-27-2018 at 7:00 am

These were the closing words Yunsup Lee, CTO, SiFive used at one of the December RISC-V Summit Keynotes entitled ‘Opportunities and Challenges of Building Silicon in the Cloud’. Fired up was more the mood among the 1000+ attendees of the RISC-V Summit held at the Santa Clara Convention Center and SiFive was among the companies showcasing… Read More


Physical Verification with IC Validator

Physical Verification with IC Validator
by Alex Tan on 12-26-2018 at 7:00 am

If a picture worths a thousand words, a tapeout quality SoC design with billions of polygons would compose a good book. To proofread this final design transformation format requires a foundry driven DRC/LVS signoff solution that nowadays is becoming more complex with further process scaling and shrinking pitch dimension.

Despite… Read More


Ethernet Enhancements Enable Efficiencies

Ethernet Enhancements Enable Efficiencies
by Tom Simon on 12-25-2018 at 7:00 am

Up until 2016, provisioning Ethernet networks was a little bit like buying hot dogs and hot dog buns, in that you could not always match up the quantities to get the most efficient configuration. That dramatically changed when the specification for Ethernet FlexE was adopted by the Optical Internetworking Forum as OIF-FLEXE-01.0.… Read More


Slowing growth in 2019 for GDP and semiconductors

Slowing growth in 2019 for GDP and semiconductors
by Bill Jewell on 12-24-2018 at 7:00 am

Growth in the global economy is expected to slow in 2019 from 2018. Ten economic forecasts released in the last two months show the percentage point change in World GDP from 2018 to 2019 ranging from minus 0.1 points to minus 0.4 points.

[table] border=”1″ cellspacing=”0″ cellpadding=”0″… Read More


Emulation Evaluation for the Ages!

Emulation Evaluation for the Ages!
by Daniel Nenni on 12-24-2018 at 7:00 am

One of the more entertaining things I get to observe in the semiconductor ecosystem is competitive customer evaluations of tools and IP. Seriously, this is where the rubber meets the road no matter what the press releases say.

This time it was emulators which is one of the most interesting EDA market segments since there is no dominant… Read More


CAPEX Cuts and Microns Memory Markdown

CAPEX Cuts and Microns Memory Markdown
by Robert Maire on 12-21-2018 at 7:00 am

For those who have been paying any attention to the semiconductor industry its no surprise that memory demand and therefore pricing is down from its peak earlier in the year. Its not getting better any time fast.

After several strong years of demand and pricing, which was followed by enormous CAPEX spending we are seeing the standard… Read More