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Avoiding Fines for Semiconductor IP Leakage

Avoiding Fines for Semiconductor IP Leakage
by Daniel Payne on 12-24-2019 at 10:00 am

Percipient IPLM

In my semiconductor and EDA travels I’ve enjoyed visiting engineers across the USA, Canada, Europe, Japan, Taiwan and South Korea. I’ll never forget on one trip to South Korea where I was visiting a semiconductor company and upon reaching the lobby a security officer asked me to take out my laptop computer, because he wanted me to… Read More


China’s chip making impact hits DRAM first

China’s chip making impact hits DRAM first
by Robert Maire on 12-24-2019 at 6:00 am

China Memory

The Doctrine of Eternal Recurrence- (Nietzsche..) Deja’ Vu all over again…

The semiconductor industry has seen this movie before, several times….new entrant into the memory chip industry, disrupts the status quo and goes on to dominate the industry (until the next new entrant…)

The Japanese did it… Read More


IEDM 2019 – Applied Materials panel EUV Recap

IEDM 2019 – Applied Materials panel EUV Recap
by Scotten Jones on 12-23-2019 at 10:00 am

On Tuesday night of IEDM, Applied Materials held a panel discussion “The Future of Logic: EUV is Here, Now What?”. The panelists were: Regina Freed, managing director at Applied Materials as the moderator, Geoffrey Yeap, senior director of advanced technology at TSMC, Bala Haran, director of silicon process research at IBM, … Read More


AI the Matrix and Intel

AI the Matrix and Intel
by Daniel Nenni on 12-23-2019 at 6:00 am

AI Matrix Intel

I would guess that most people have seen or at least heard of the Matrix movies but how many people can remember who vanquished the earth to begin the series? It was artificial intelligence (AI) of course which seemed pretty far fetched 20 years ago, but today not so much. In fact, for those of us in the AI know it seems quite likely in some… Read More


The Tech Week that was December 16-20 2019

The Tech Week that was December 16-20 2019
by Mark Dyson on 12-22-2019 at 6:00 am

As we approach the end of 2019 I wish everybody a Merry Christmas and a Happy New Year. This will be my last update for a few weeks as I will also take a little break over the holiday season.

Despite a lot of people winding down for the year, there was still lots of interesting news from last week with lots of data points pointing to an even

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Debugging Hardware Designs Using Software Capabilities

Debugging Hardware Designs Using Software Capabilities
by Daniel Nenni on 12-20-2019 at 6:00 am

Every few months, I touch base with Cristian Amitroaie, CEO of AMIQ EDA, to learn more about how AMIQ is helping hardware design and verification engineers be more productive. Quite often, his answers surprise me. When he started describing their Design and Verification Tools (DVT) Eclipse Integrated Development Environment… Read More


Network on Chip Brings Big Benefits to FPGAs

Network on Chip Brings Big Benefits to FPGAs
by Tom Simon on 12-19-2019 at 10:00 am

NAPs provide connection to high speed NoC

The conventional thinking about programmable solutions such as FPGAs is that you have to be willing to make a lot of trade-offs for their flexibility. This has certainly been the case in many instances. Even just getting data across the chip can eat up valuable routing resources and add a lot of overhead. These problems are exacerbated… Read More


Full Solution for eMRAM Coming in 2020

Full Solution for eMRAM Coming in 2020
by Tom Simon on 12-19-2019 at 6:00 am

Trimming for eMRAM in Tessent

It’s amazing to think that Apollo moon mission used computers that were based on magnetic core memories. Of course, CMOS memories superseded them rapidly. However, over the decades since, memory technologies have advanced significantly, in terms of density, power and new types of technologies, e.g NAND Flash. Ever since the… Read More


Ultra-Short Reach PHY IP Optimized for Advanced Packaging Technology

Ultra-Short Reach PHY IP Optimized for Advanced Packaging Technology
by Tom Dillinger on 12-18-2019 at 10:00 am

Frequent Semiwiki readers are no doubt familiar with the rapid advances in 2.5D heterogeneous multi-die packaging technology.  A relatively well-established product sector utilizing this technology is the 2.5D integration of logic die with a high-bandwidth memory (HBM) DRAM die stack on a silicon interposer;  the interposer… Read More


A VIP to Accelerate Verification for Hyperscalar Caching

A VIP to Accelerate Verification for Hyperscalar Caching
by Bernard Murphy on 12-18-2019 at 6:00 am

NVMe

Non-volatile memory (NVM) is finding new roles in datacenters, not currently so much in “cold storage” as a replacement for hard disk drives, but definitely in “warm storage”. Warm storage applications target an increasing number of functions requiring access to databases with much lower latency than is possible through paths… Read More