Everyone is talking about 5G deployment. The promises and the hype are finally turning into reality and products. While excitement is appropriate, victory is not yet in hand. There are still technical hurdles to conquer before the full potential of 5G is realized. In this post, I’ll explore one such challenge – the reliable use … Read More
2026 Outlook with Richard Hegberg of Caspia TechnologiesTell us a little bit about yourself and…Read More
Siemens EDA Illuminates the Complexity of PCB DesignAs heterogeneous multi-die design becomes more prevalent, the…Read More
Accelerating Advanced FPGA-Based SoC Prototyping With S2CHaving spent a significant amount of my career…Read More
Verification Futures with Bronco AI Agents for DV DebugVerification has become the dominant bottleneck in modern…Read MoreIts all about the Transistors- 57 Billion reasons why Apple/TSMC are crushing it
The Apple event today was essentially a reveal of the latest and greatest silicon coming out of the Apple/TSMC partnership and how far ahead of everything else it is. The Mac was simply an aluminum container for the new silicon.
More importantly the event and specs of the TWO new chips, the M1 Pro and the M1 Max demonstrate that the M1… Read More
Neural Network Growth Requires Unprecedented Semiconductor Scaling
The truth is that we are just at the beginning of the Artificial Intelligent (AI) revolution. The capabilities of AI are just now starting to show hints of what the future holds. For instance, cars are using large complex neural network models to not only understand their environment, but to also steer and control themselves. For… Read More
Take the Achronix Speedster7t FPGA for a Test Drive in the Lab
Achronix is known for its high-performance FPGA solutions. In this post, I’ll explore the Speedster7T FPGA. This FPGA family is optimized for high-bandwidth workloads and eliminates performance bottlenecks with an innovative architecture. Built on TSMC’s 7nm FinFET process, the family delivers ASIC-level performance … Read More
Using PUFs for Random Number Generation
In our daily lives, few of us if any, would want randomness to play any role. We look for predictability in order to plan our lives. But reality is that random numbers have been playing a role in our lives for a long time. The more conspicuous use cases of random numbers are with key fobs, and nowadays mobile phones. And then there are a … Read More
APR Tool Gets a Speed Boost and Uses Less RAM
Automatic Place and Route (APR) tools have been around since the 1980s for IC design teams to use, and before that routing was done manually by very patient layout designers. Initially the big IDMs had their own internal CAD groups coding APR tools in house, but eventually the commercial EDA market picked up this automation area,… Read More
IEDM 2021 – Back to in Person
Anyone who has read my previous articles about IEDM knows I consider it the premier conference on process technology.
Last year due to COVID IEDM was virtual and although virtual offers some advantages the hallway conversations that can be such an important part of the conference are lost. This year IEDM is returning as a live event… Read More
Silicon Startups, Arm Yourself and Catalyze Your Success…. Spotlight: Semiconductor Conferences
The arrival of fall seems to typically raise the number of conferences hosted by semiconductor ecosystem companies. The conferences may go by different names. But whether called a forum, summit, conference, or by some other creative name, the purpose is the same. It is to bring together technologists and business people together… Read More
Chiplet: Are You Ready For Next Semiconductor Revolution?
During the 2010-decade, the benefits of Moore’s law began to fall apart. Moore’s law stated transistor density doubled every two years, the cost of compute would shrink by a corresponding 50%. The change in Moore’s law is due to increased in design complexity the evolution of transistor structure from planar devices, to Finfets.… Read More
Podcast EP43: Navigating the Architecture Exploration Jargons and What Do They Mean to a Chip Architect?
Dan is joined by Deepak Shankar, founder of Mirabilis Design. Dan explores the application and impact of architectural exploration on chip and system design.
The views, thoughts, and opinions expressed in these podcasts belong solely to the speaker, and not to the speaker’s employer, organization, committee or any other group… Read More



AI Bubble?