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Architecture Exploration with Miribalis Design

Architecture Exploration with Miribalis Design
by Deepak Shankar on 07-23-2021 at 6:00 am

AE1

Architectural exploration is a vast area of engineering design. It starts with the planning phase where the designer will have the list of requirements from the customer and the rough architecture most likely on a paper. Next is to assemble the model and conduct variety of trade-offs for optimization and functional studies to … Read More


A Custom Layout Environment for SOC Design Closure

A Custom Layout Environment for SOC Design Closure
by Tom Simon on 07-22-2021 at 10:00 am

custom layout environment

Throughout the process of physical design and verification there are many groups working on the design. Most often these groups are working independently or in parallel but separately, using their own specialized tools, such as P&R, DRC, custom layout, DFM, etc. At the end of the process there is an inevitable requirement… Read More


Magnetic Immunity for Embedded Magnetoresistive RAM (eMRAM)

Magnetic Immunity for Embedded Magnetoresistive RAM (eMRAM)
by Tom Dillinger on 07-22-2021 at 6:00 am

coil interaction

Previous SemiWiki articles have discussed the introduction of embedded Spin-Transfer Torque Magnetoresistive RAM IP from GLOBALFOUNDRIES, as an evolution replacement for non-volatile embedded flash memory. (link, link)

Those articles described the key features of STT-MRAM technology, but didn’t delve into a key reliability… Read More


Electronics Recovery Mixed

Electronics Recovery Mixed
by Bill Jewell on 07-21-2021 at 2:00 pm

Electronics Recovery Mixed

Electronics production continues to recover from the COVID-19 pandemic. However, the recovery is mixed by country. The chart below shows three-month-average (3/12) change versus a year ago in electronics production by local currency for key Asian countries. China was averaging about 10% growth prior to the pandemic. After… Read More


WEBINAR: Maximizing Exit Valuations for Technology Companies

WEBINAR: Maximizing Exit Valuations for Technology Companies
by Daniel Nenni on 07-21-2021 at 10:00 am

Silicon Catalyst Exit Webinar

I had the opportunity to speak with Pete Rodriguez and Alain Labat in regards to the upcoming webinar on M&A. I have worked with both Pete and Alain in the past so I can tell you personally that this event will be well worth your time. This is truly an all star cast with a collective experience base with billions of dollars worth of … Read More


A Hardware Security Standard Advances

A Hardware Security Standard Advances
by Bernard Murphy on 07-21-2021 at 6:00 am

security min

Security is a slippery topic. We all agree that “something should be done”, but most of us are waiting for someone else to lead the way. There’s no shortage of proprietary solutions, though given the distributed nature of the problem it’s difficult to see how those separately or collectively can rise to the occasion. What we really… Read More


EDA Flows for 3D Die Integration

EDA Flows for 3D Die Integration
by Tom Dillinger on 07-20-2021 at 6:00 am

future integration

Background

The emergence of 2.5D heterogeneous die integration using a silicon (or organic) interposer has enabled unique system architectures.  The term “More than Moore” has been used to describe the circuit density and cost advantages of leveraging multiple die in the package, the die potentially in different process technologies. … Read More


How can Semiconductor Manufacturers add new Capacity to Meet Demand as Quickly as Possible?

How can Semiconductor Manufacturers add new Capacity to Meet Demand as Quickly as Possible?
by Daniel Nenni on 07-19-2021 at 10:00 am

Aston Webinar

The causes of the chip shortage crisis have been widely discussed, but what about specific solutions? How can semiconductor manufacturers add new capacity to meet demand as quickly as possible?

While there is a lot of talk about investment in building new chip plants, these traditional methods of manufacturing capacity growth… Read More


VLSI Technology Symposium – Imec Alternate 3D NAND Word Line Materials

VLSI Technology Symposium – Imec Alternate 3D NAND Word Line Materials
by Scotten Jones on 07-19-2021 at 6:00 am

T8 1 Arjun Page 08

At the 2021 VLSI Technology Symposium, Imec presented on Ruthenium (Ru) and Molybdenum (Mo) as alternate Word Line (WL) materials for 3D NAND Flash “First Demonstration of Ruthenium and Molybdenum Word lines Integrated into 40nm Pitch 3D NAND Memory Devices”. I had an opportunity to interview one of the authors: Maarten Rosmeulen.… Read More


Wireless Transportation Disruption

Wireless Transportation Disruption
by Roger C. Lanctot on 07-18-2021 at 10:00 am

Wireless Transportation Disruption

One of the toughest tech tasks is adopting a new emerging technology that is fundamentally incompatible with the old. In the realm of connected cars, car makers and their suppliers labored for more than two decades on a wireless standard – called dedicated short-range communications (DSRC) – that was intended to enable intervehicle

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