Podcast: Will Arm Risk RISC-V?by Daniel Nenni on 06-15-2022 at 6:00 amCategories: Uncategorized
Driven by the need to rapidly move data across a chip, the NoC IP is already a very common structure for moving data with an SoC. And various implementations of the NoC IP are available in the market depending on the end system requirements. Over the last few years, the RISC-V architecture and the TileLink interface specification … Read More
For the past few decades, System-on-Chip (SoC) has been the gold standard for optimizing the performance and cost of electronic systems. Pulling together practically all of a smartphone’s digital and analog capabilities into a monolithic chip, the mobile application processor serves as a near-perfect example of an SoC. But… Read More
Dan is joined by Malcolm Penn, founder and CEO of Future Horizons, a firm that provides industry analysis and consulting services on the global semiconductor industry.
Dan and Malcolm discuss the current and future state of the semiconductor industry. What has driven the cyclic nature of the business and are we doomed to repeat… Read More
As I previously wrote about here, Intel is presenting their Intel 4 process at the VLSI Technology conference. Last Wednesday Bernhard Sell (Ben) from Intel gave the press a briefing on the process and provided us with early access to the paper (embargoed until Sunday 6/12).
“Intel 4 CMOS Technology Featuring Advanced FinFET Transistors… Read More
Dan is joined by Sharad Chole, chief scientist & co-founder at Expedera. Sharad is an expert in AI frameworks, power-aware neural network optimizations, and programmable dataflow architectures. Previously, he was an architect at Cisco, Memoir Systems, and Microsoft.
Dan and Shared explore Expedera’s unique AI… Read More
The demands of 5G requires new designs to not only save power but also increase performance and by moving to advance power-saving nodes and by using eFPGAs will help to achieve these goals. This paper will introduce 5G and O-RAN, the complexity of these systems, and how flexibility could be beneficial. Then we will dive into how eFPGA… Read More
The emergence of 2.5D packaging technology for heterogeneous die integration offers significant benefits to system architects. Functional units may be implemented using discrete die – aka “chiplets” – which may be fabricated in different process nodes. The power, performance, and cost for each unit may be optimized separately.… Read More
SLAM – simultaneous localization and mapping – is already a well-established technology in robotics. This generally starts with visual SLAM, using object recognition to detect landmarks and obstacles. VSLAM alone uses a 2D view of a 3D environment, challenging accuracy; improvements depend on complementary sensing inputs… Read More
Dan is joined by semiconductor and EDA industry veteran Douglas Fairbairn. Doug provides details about MegaChips, where he currently heads business development. MegaChips is a large, successful 30-year old semiconductor company based in Japan.
Doug is helping MegaChips launch in the US with a focus on ASIC design and delivery.… Read More
Weebit Nano Moves into the Mainstream with Customer Adoption