MTS Design Enablement

Summary of Role:

GlobalFoundries seeks an experienced Optical Proximity Correction (OPC) Engineer located at GlobalFoundries facility in Malta, NY.  The successful candidate will possess the skills necessary to develop computational lithography solutions for 14nm, 12nm and 12nm Derivative technology nodes.

Essential Responsibilities:

• Develop and maintain leading edge OPC tech files (keywords) for advanced generation lithography
• Processes.
• Collaborate with design rule, lithography, etch, modeling, and infrastructure engineers in cross-functional team environments to determine optimal computational solutions.
• Perform root cause analysis of printing and yield limiting hotspots using proven tools.
• Research, apply and continually improve industry and company best practices surrounding OPC development.
• Participate on cross-functional semiconductor development projects.
• Perform all activities in a safe ad responsible manner and support all Environmental, Health, Safety & Security requirements and programs

Required Qualifications:    

• Bachelor’s Degree  in Electronics, Engineering, Computer Science, Mathematics, Physics or related discipline
  Knowledge of scripting and computer languages such as Perl, Python, TCL, shell and others
• Fundamental understanding of semiconductor development and OPC or similar Electronic Design Automation (EDA) knowledge.
• Experience with or knowledge of the following skills: statistical data analysis, simulation, programming especially in a cluster environment, numerical methods and techniques, optimization.
• Years of Experience: 7 or More Years Relevant Experience
• Language Fluency:  English (Written & Verbal)Preferred Qualifications:
• Master’s Degree or PhD in Electronics, Engineering, Computer Science, Mathematics, Physics or related discipline
• Demonstrated knowledge and expertise in scripting and computer languages such as C++, Python, TCL, shell and others.
• Knowledge of lithography, RET, OPC, mask data preparation, and design rules, and demonstrated experience in a technology development environment
• Fundamental understanding of high performance Complementary Metal–Oxide–Semiconductor (CMOS) patterning/design integration
• Demonstrated experience with or knowledge of the following skills: analysis of statistical data, resolution enhancement techniques, simulation, and programming especially in a cluster environment, numerical methods and techniques, optimization.
• Demonstrated ability to collaborate with upstream and downstream development teams
  OPC-related patents and/or publications