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DFT (Design for Test) Engineer– ASIC

DFT (Design for Test) Engineer– ASIC
by Admin on 01-10-2023 at 2:04 pm

  • Full Time
  • Noida, India
  • Applications have closed

Website Agnisys

Job responsibilities:

· Has worked on scan-stitching; and has good knowledge of Scan-stitching related


· Has worked on MBIST implementation and is confident with the Tessent

flow of mbist-insertion.

· Has worked on ATPG; and is well-conversed with the files required to run

· ATPG. Knowledge and experience with Tessent ATPG (mentor) is a plus

· Has worked on Spyglass-Lint.

· Knowledge of automation scripts is a plus.

· Knows the basics of JTAG & IJTAG.

· Support Spyglass debug and coverage co-relation.

· Support scan-stitching runs. Debug DRC other scan-related issues

· Support ATPG. debug ATPG issues. debug coverage holes.

· Support MBISTBISR insertion. debug insertion issues verification issues

· Support gate-level simulations.

Job Types: Full-time, Regular / Permanent

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