CHERI webinar banner

Applications Engineering Technical Lead

Applications Engineering Technical Lead
by Admin on 03-24-2020 at 6:52 am

Website Achronix

Achronix is a privately held fabless corporation based in Santa Clara, California and offers high-performance FPGA solutions. Achronix’s history is one of pushing the boundaries in the high-performance FPGA market. Achronix offerings include programmable FPGA fabrics, discrete high-performance and high-density FPGAs with hardwired system-level blocks, data center and HPC hardware accelerator boards, and best-in-class EDA software supporting all Achronix products.

Job Description/Responsibilities

  • Lead the factory applications organization to ensure excellent post-sales technical support to customers worldwide using Achronix products.
  • Support sales teams in enabling design wins by representing Achronix as a technical leader in pre-sales customer meetings.
  • Coordinate generation of technical collateral, including user guides and application notes, reference designs and training material for all Achronix products.
  • Collaborate with the systems engineering team on device and board bring-up efforts and manage lab activities.
  • Act as liaison and central point of contact for all field applications engineering (FAE) teams to enable successful account management and a good communications channel between the field and the factory.
  • Engage with multiple engineering teams across organizations, including hardware, software, and systems engineering, on cross-functional efforts.
  • Work with the product planning team on roadmap generation and help define technical specs based on learnings from customer experiences.
  • Participate in trade shows and assist with outbound marketing efforts.
  • Up to 25% travel may be required.

Required Skills

  • Excellent communication and writing skills with ability to multi-task.
  • Expert in FPGA/programmable logic architecture and design methodologies.
  • Strong grasp of logic design, synthesis, timing, place and route and simulation for FPGA flows.
  • Understanding of verification, test and quality concepts.
  • Experience writing RTL in VHDL, Verilog or System Verilog, and scripting abilities in PERL/Tcl.
  • Basic knowledge of SerDes, protocol IP, memory interfaces, processors and machine learning concepts, in particular for hardware acceleration applications.

Education and Experience

  • 10 years of hands-on working experience with FPGAs and/or ASICs in a technical leadership role.
  • 5 years’ experience managing teams of highly skilled engineers.
  • 5 years’ experience being in a customer-facing role.
  • Bachelor’s or Master’s degree in EE, CE or equivalent work experience.
Apply for job

To view the job application please visit

Share this post via: