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Hardware Engineer – Circuit Design

Hardware Engineer – Circuit Design
by Admin on 03-24-2020 at 6:53 am

Website Achronix

Job Description/Responsibilities

The employee will work on the design, implementation, and characterization of full-custom, high-performance digital logic in 14nm/16nm and below. The employee will share responsibilities across design and verification. His or her responsibilities will include the following:Job Description/Responsibilities

Primary Job Responsibilities

  • CMOS circuit design of different macros in the FPGA fabric (full-custom portion of the FPGA), including clock distribution in the fabric.
  • Track planning over the fabric, evaluating performance of various metals in the interconnect stack.
  • Timing, EM, and IR flows and methodologies for the fabric.
  • Library characterization of custom standard-cell library cells.
  • Assist in the physical design of fabric IP using industry-standard place-and-route tools (RTL to GDS).
  • Collaborate with other members of the team to optimize our physical design and verification methodologies.
  • Estimate power, performance, and area of RTL blocks both before and after physical implementation.
  • Develop design methodologies and guidelines for each process node.
  • Work closely with foundry employees on process development, customer support, EDA, reliability, test, and product qualification.
  • Develop automated processes for block-level and system-level verification.

Required Skills

  • Experience with digital VLSI CMOS circuit design and physical design in advanced FinFet technology nodes.
  • Experience with schematic entry, netlist generation, and SPICE simulation.
  • Understanding of layout, layout-dependent effects, and parasitic effects.
  • Comfortable with physical design, verification, and analysis tools from vendors such as Synopsys and Ansys.
  • Comfortable designing flows and methodologies from scratch and maintaining them.
  • Excellent debugging skills.
  • Experience with digital VLSI design.
  • Experience reading and writing RTL (e.g., Verilog).
  • Experience with commercial ASIC CAD tools (e.g. DC, ICC, PrimeTime, Totem).
  • Experience with commercial CAD flows (LVS, DRC, simulation, etc.).
  • Familiarity with object-oriented programming concepts is a plus.
  • Familiarity with revision-control systems (e.g., perforce, git) is a plus.
  • Familiarity with using and/or designing FPGAs is a plus.
  • Familiarity with hardware protocols such as Ethernet, PCIe, and DDR3/4 is a plus.
  • Well organized, punctual, and excellent communication skills.

Education and Experience

  • MS in electrical engineering or computer science +2-10 years experience
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