WP_Term Object
(
    [term_id] => 18278
    [name] => Codasip
    [slug] => codasip
    [term_group] => 0
    [term_taxonomy_id] => 18278
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 13
    [filter] => raw
    [cat_ID] => 18278
    [category_count] => 13
    [category_description] => 
    [cat_name] => Codasip
    [category_nicename] => codasip
    [category_parent] => 178
)
            
CHERI webinar banner
WP_Term Object
(
    [term_id] => 18278
    [name] => Codasip
    [slug] => codasip
    [term_group] => 0
    [term_taxonomy_id] => 18278
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 13
    [filter] => raw
    [cat_ID] => 18278
    [category_count] => 13
    [category_description] => 
    [cat_name] => Codasip
    [category_nicename] => codasip
    [category_parent] => 178
)

How Codasip Unleashed CHERI and Created a Paradigm Shift for Secured Innovation

How Codasip Unleashed CHERI and Created a Paradigm Shift for Secured Innovation
by Mike Gianfagna on 01-15-2024 at 6:00 am

How Codasip Unleashed CHERI and Created a Paradigm Shift for Secured Innovation

At the recent RISC-V Summit, Dr. Ron Black, CEO of Codasip unveiled a significant new capability to create a more secure environment for innovation. Rather than re-writing trillions of lines of code to solve the security problem, Ron described a much more practical approach. One that brought a research topic into mainstream deployment. The results could have far-reaching impact. You can learn about the magnitude of the data security problem and the overall approach Codasip is taking in this RISC-V summary piece. In this discussion, I will dig into some of the details that allowed this innovation to happen. The standard that was developed in the lab, and the road to production that Codasip provided.  Read on to learn how Codasip unleashed CHERI and created a paradigm shift for secure innovation.

The Beginnings of CHERI

CHERI (Capability Hardware Enhanced RISC Instructions) is a joint research project of SRI International and the University of Cambridge to revisit fundamental design choices in hardware and software to dramatically improve system security. CHERI has been supported by DARPA programs since 2010, as well as other DARPA research and transition funding.

CHERI extends conventional hardware Instruction-Set Architectures (ISAs) with new architectural features to enable fine-grained memory protection and highly scalable software compartmentalization. The CHERI memory-protection features allow historically memory-unsafe programming languages such as C and C++ to be adapted to provide strong, compatible, and efficient protection against many currently widely exploited vulnerabilities. This ability to retro-fit existing systems with higher security is what makes CHERI so attractive – no need for a major re-write to enhance security.

CHERI is a hybrid capability architecture in that it can blend architectural capabilities with conventional MMU-based architectures and microarchitectures, and with conventional software stacks based on virtual memory and C/C++. This approach allows incremental deployment within existing software ecosystems, which the developers of CHERI have demonstrated through extensive hardware and software prototyping.

CHERI concepts were developed first as a modification to 64-bit MIPS and 64-bit ARMv8-A. All of these projects are of a research nature, with the goal of developing a proof-of-concept. While these efforts represent important steps to a commercial solution to the data security problem, a true “industrial strength” solution was out of reach – until recently.

Codasip Delivers a Production Implementation of CHERI for the RISC-V ISA

In mid-October, 2023, Codasip announced the 700 RISC-V processor family, expanding its offering beyond embedded processor IP to stand-alone application processors. In its own words, “bringing the world of Custom Compute to everyone.” The 700 family is a configurable and customizable set of RISC-V baseline processors. It is intended to complement Codasip’s embedded cores by offering a different starting point to accommodate the need for higher performance. And Codasip Studio delivers a streamlined design process that unleashes the potential of the 700 family.

It was against this backdrop that Codasip fundamentally changed the deployment vector for CHERI. Using Codasip Studio, built-in fine-grained memory protection was added to the 700 processor family by extending the RISC-V ISA with CHERI-based custom instructions. To enable the use of these instructions, Codasip also delivered the software environment to take advantage of CHERI technology, bringing a full software development flow to add memory protection.

And because CHERI technology can be applied selectively to critical functions, it is possible to enhance the security of existing products with a small effort, often through a simple code recompilation. This allows the huge pool of existing C/C++ software to be leveraged to create more secure systems cost-effectively. Codasip demonstrated the new CHERI-based security capability at the recent RISC-V Summit, and lead customers will get early access to the core with CHERI capabilities in the second half of 2024.

These developments hold the promise to fundamentally change the landscape regarding data security. This is clearly one to watch. There are places to learn more about this important development. Before I get to those, I’d like to cite a few examples of how CHERI could change data security. At his RISC-V keynote, Ron Black detailed some epic security breaches that have occurred over the years. You may remember some, or all of these:

  • The Heartbleed bug: Introduced in software in 2012 and disclosed in 2014. Huge impact. more than 90,000 devices still not patched in 2019. Estimated cost is over $500 million. This is one of the worst software vulnerabilities of all time.
  • BMW Telematics Control Unit bugs: In 2017, Tencent’s Keen Security found a memory corruption vulnerability in the Technical Control Unit TCU firmware. The researchers could bypass signature protection and gain root access to the TCU via remote code execution​. They could then send crafted Controller Area Network (CAN bus) messages to affect control of other electronic control units in the vehicle.
  • Netgear router hack: In a recent competition organized by the Zero Day Initiative, Claroty’s Team 82 found and exploited a vulnerability in the Netgear Nighthawk RAX30 router. The routers utilize a software protection technique called stack canaries to secure against buffer overflow attacks. The team could bypass the canary. An attacker may surveil your procedures, highjack connections, send you to malicious sites, or embed malware into your ecosystem.

The goal of this exercise was not to cause panic, but to simply point out that ALL of these vulnerabilities were preventable with Codasip CHERI technology.  And that’s why this is an important development to watch and use.

To Learn More

There is a rich library of information about CHERI here.  A press release, a technical paper, several informative blogs and the ability to request more information. I highly recommend spending some time there.  Especially of you are concerned about data security, and who isn’t?  And that’s how Codasip unleashed CHERI and created a paradigm shift for secure innovation.

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