When mentioning CEVA DSP IP cores, the first reaction is to think about the complexes DSP functions used into wireless Modem Application like 3G and Long Term Evolution (LTE). Considering that CEVA market share is above 70% for these products, such a reaction makes sense. But did you knew that CEVA DSP IP cores are also empowering audio/voice devices, in wireless (handset, smartphones) applications requiring ultra low power consumption, as well as in consumer oriented (non wireless) applications, where the highest performance is key?
If you still have a doubt about CEVA positioning in this field, just have a look at CEVA–powered audio/voice device (ie: IC, not cores!) shipments over 2008-2012: more than 2 Billion cumulated shipments of IC integrating CEVA DSP IP cores tailored for audio or voice application:
The explosion of smartphones shipments has obviously put a strong focus on the Application processor and Baseband modem shipments, respectively empowered by the main CPU and DSP IP cores, delivered by ARM Ltd. and CEVA respectively. But, as well as ARM is investing the graphic market with their MALI GPU core family, CEVA has invested the Audio/Voice market with the Teak Lite family. Looking at smartphone block diagram, you can find this DSP located in three main places:
- Super wideband voice codecs, noise reduction, echo canceller, audio codecs
- Low power audio codecs (long playback time), post processing (e.g. DM3+)
- Ultra-low power voice processing (e.g. voice trigger), noise reduction, audio PP
As usual, a precise picture (Credit: The Linley Group) will help to clearly understand the DSP positioning within (1), (2) and (3):
It’s impressive to see how voice processing in mobile handsets is allocated with increasing DSP MIPS (200-300MHz today), to meet new requirements (higher bandwidth vocoders, noise suppression, ANC like in the iPhone 5 and more), calling for Audio/Voice dedicated DSP offering up to 500 MHz MIPS in the very near future, say in 2015.
The race for performance is even more critical in CE market segments, with emergence of connected or smart TV, integrating camera and microphones. CEVA proposes a solid roadmap for the Teak Lite (TL) 32 bit DSP core family:
the TeakLite III is being integrated in products shipping today in production, allowing customers to implement their own software in the audio codec to help differentiate their products from the competition.
The next architecture generation based on the TeakLite 4 DSP core, will offer a framework of Application Specific DSP IP core, in order to provide the best Power/Performance/Area (PPA) optimization for the targeted application, including the future high end home or gaming applications, yet to come, that will require even higher performances for audio/voice processing – the 500 MHz MIPS already mentioned.
The TeakLite 4 DSP IP core family is more than just another DSP IP core, CEVA understood how efficient it was for customers to benefit from a platform, rather than simply a naked core. That is, the platform offer integrates the various folowing features, I should say differentiators:
- Most powerful audio/voice DSP
- Dual 32-bit MAC, quad 16-bit MAC
- 1.5 GHz at 28nm HPM
- Variable 10 stage pipeline
- Special emphasis on power optimization
- Extensive audio/voice SW library (with more than 100 SW codecs and functions by CEVA and partners)
- Area optimized, down to 90K gates (Small memory footprint, using 16 and 32-bit instruction width)
- Extensible architecture, allowing customer differentiation and user defined ISA
Last, but not least, CEVA has understood very early that the success of a processor core (whether it’s a CPU, DSP or GPU) will not only be based on the most advanced architecture (necessary condition, but not sufficing) but also on the long term building of a large ecosystem, made of SW developers partners, IP vendors, Silicon Foundries, EDA tools vendors… and satisfied customers! Sounds familiar when you remind how ARM Ltd has built his position of #1 IP vendor. Both companies are on the same track, one with CPU, the other with DSP, and we don’t see how they could lose their respective leader position, one with DSP (CEVA), one with CPU (ARM).
Eric Esteve from IPNEST –