Keysight EDA 2025 Event
WP_Term Object
(
    [term_id] => 151
    [name] => General
    [slug] => general
    [term_group] => 0
    [term_taxonomy_id] => 151
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 442
    [filter] => raw
    [cat_ID] => 151
    [category_count] => 442
    [category_description] => 
    [cat_name] => General
    [category_nicename] => general
    [category_parent] => 0
)

My Tryst with Semiconductors and EDA

My Tryst with Semiconductors and EDA
by Pawan Fangaria on 08-19-2015 at 4:00 pm

Yes, today I realize it feels like a tryst with semiconductors. In actual meaning; it wasn’t a love affair with semiconductors, but I must say the greatest thing it taught me about how it approaches towards perfection. And that became the guiding principle in my life; how can I do something better. Of course nothing is perfect in life and in science, as far as I know, however things can always move towards perfection. The semiconductor manufacturing professionals can tell how they strive to gain perfection in moving to newer and newer technology processes.


When I was in primary level school, I was told that light moves in a straight line; in secondary level school, it still moved in straight line, but it could refract and deflect. In college level, I learnt that light has waves and it is actually not a straight movement, of course we cannot see those waves. Now when I realize about these waves’ real implications during semiconductor manufacturing at the nanometer scale, it’s inspiring, that’s closer to perfection. The perfection is not over yet; now we are talking of EUV, 7nm and 5nm process.

Let me reflect a little on my encounter with semiconductors and EDA. During initial schooling I was fascinated towards aeronautical engineering; computer was not known to me at that time. But during undergraduate college level, I had chosen physics as my major subject and I was attracted towards solid state physics. Computers (PCs) had arrived during my engineering at Indian Institute of Science. And there were chips for CPUs, memories,… Seeing VLSI as a new, emerging field and its close to perfection designs and processes, I chose VLSI as my specialization subject.

In job, again it was VLSI (CAD) division of an Indian public sector company, ITI. Being a fresh grad out of college, I remember how I had to strive to get me assigned to that division. One can imagine what kind of salary one could expect from an Indian public sector company at that time, 1990; in fact my father ridiculed me on my salary! But, in my personal opinion the life at ITI was great, a golden period when I wrote several tools for gate array, full custom and standard cell based designs and learnt a lot. We, at ITI, had a 3 micron foundry at that time, and I remember how secluded it was and how perfect, dust proof environment, chemicals, and equipments had to be maintained. So, ITI was a true, perfect catalyst in my professional and working life for my ‘tryst’ with EDA and semiconductors :). We used to review at least 10 best papers from IEEEjournals, DAC proceeding, and so on before implementing anything in our tools, so that was a real fun. That’s when my admiration grew about these global technical institutions and forums.

At ITI, in my ~5 years, we had learnt the concepts of HLS, but it was only at the conceptual level. Implementation of logic synthesis was just starting and we saw Synopsystaking world wide lead into that area. I moved to Duet Technology (long ago acquired by Motorola, now Freescale) and then to Cadence in 1997. At Cadence, it was a real eye opener for me to the world semiconductor and EDA industry. There were many things to learn – technology, tools, business, management, customers, strategic relations, partnerships, and so on. During my life at Cadence, I have seen how we have gradually moved the level of abstraction up at several stages of design to address manufacturing issues – DFM, DFY, and so on. That’s when I realized we could do lithography awareness at the floorplanning level; that gave me a patent awarded at that time!

Today, at sub-20nm we are seeing designs becoming highly vulnerable to variability effects. The perfection at 90nm or 45nm no more works at 20nm. So, the scale of perfection in designs has to be improved further to get a working chip discounting variability. And we are seeing tools accounting for variability effects now; specialized formats have evolved to specify variability.

Semiconductor and EDA has been an interesting discipline in my life which tells me that nothing is perfect, but you can make it perfect to work within a set of parameters and that can go up to the levels of electrons and protons. That’s physics, that’s engineering! Nothing is absolute, absolutely!

Pawan Kumar Fangaria
Founder & President at www.fangarias.com

Share this post via:

Comments

0 Replies to “My Tryst with Semiconductors and EDA”

You must register or log in to view/post comments.