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Defacto Banner
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Defacto at the 2025 Design Automation Conference #62DAC

Defacto at the 2025 Design Automation Conference #62DAC
by Daniel Nenni on 06-12-2025 at 8:00 am

Key Takeaways

  • Defacto is announcing a major release of their tool: SoC Compiler 11.0.
  • The SoC Compiler can now interoperate with IP configuration tools and auto-connect IPs for quick SoC generation.
  • IP-XACT users will find compelling reasons to migrate to Defacto, as the tool covers all essential IP-XACT mechanisms.
  • Defacto software can capture physical requirements to improve PPA by providing design refactoring and restructuring capabilities.
  • Defacto is unveiling AI-based capabilities, including an AI assistant to help users generate Tcl and Python scripts.

62nd DAC SemiWiki defacto

Defacto has been a leading provider of SoC integration tools for large-scale designs for years. Most major semiconductor companies already use their solutions, and several customers will be presenting how they leverage the Defacto solution (SoC Compiler) at the upcoming DAC conference.

This year, Defacto is announcing a major release of their tool: SoC Compiler 11.0. We just blogged about it—check it out here.

This new version reaches a new level of automation. The tool can now interoperate with IP configuration tools and auto-connect IPs to generate a complete SoC ready for both simulation and logic synthesis in minutes. Format complexity isn’t an issue for Defacto’s SoC Compiler, since it can digest and generate RTL (System Verilog, Verilog & VHDL), IP-XACT, UPF, and SDC formats.

With this major release, IP-XACT users will find compelling reasons to migrate to Defacto. The Defacto tool has reached a production level of maturity while covering all essential IP-XACT mechanisms including packaging, querying, linting, checking, assembling, editing using TGI, and reporting (memory maps, registers, etc.) – all while maintaining a strong link with RTL.

Another key differentiator of the Defacto tool is physical awareness of the generated RTL, pre-synthesis. Specifically, Defacto software can capture physical requirements to improve PPA by providing design refactoring and restructuring capabilities.

With this major release, Defacto demonstrates that very complex design hierarchy manipulations can be performed incredibly quickly.

At this year’s DAC, they’ll be presenting a poster jointly with Arm on Monday, June 23, where Arm will explain how they restructured an 18,000-instance design with millions of connections and multiple hierarchy levels in less than an hour.

They’ve even been selected to participate in the DAC Poster Gladiator competition (also on Monday, June 23).

The presentation title is: A New Methodology to Generate Multiple SoC Configurations Quickly

Last but not least, Defacto is unveiling AI-based capabilities at this DAC. They’ve built an AI assistant to help with tool usage, and more importantly, assist Defacto users to easily generate Tcl and Python scripts. They’ll be providing live demonstrations at their booth.

You should definitely stop by their booth on the first floor (booth #1527). They have delicious French chocolates to sample.

How do you find them at DAC? They typically have a giant ball floating above their booth—you can’t miss it on the first floor.

Make sure to contact them here to schedule a meeting at their booth. Hope to see you there!

DAC registration is open.

Also Read:

SoC Front-end Build and Assembly

Video EP8: How Defacto Technologies Helps Customers Build Complex SoC Designs

2025 Outlook with Dr. Chouki Aktouf of Defacto

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