If I ask the question, “What has grown 4,000x over the last twenty-five years?”, most people will start throwing names of some stocks. Although various stock markets have had crazy run ups and yes, there is a stock that has grown 2,500x over that period of time, the answer to the 4,000x question is not a stock. What if I modify the question and ask “what has grown an average 2x every 2 years over the last twenty-five years?”, Moore’s law may pop up in many people’s mind. But the answer to both the questions is Ethernet speed evolution. We all benefit from it on a daily basis and have come to take high-speed networking for granted.
Figure: Evolution of Ethernet Speeds
Even without any competing communications standards, Ethernet speed evolution has kept a nice pace, driven by the IEEE 802.3 standards committee and working group. This vigor got a boost in 2014 when Arista, Broadcom, Google, Mellanox and Microsoft formed the 25G Ethernet Consortium. The motive was to get to 25G quicker than what the Ethernet standards committee’s roadmap was showing at that time. Progress has been so rapid that the name has already gotten outdated. The consortium recently rebranded itself as the Ethernet Technology Consortium, so that it does not have to look for another name every time the next goal is achieved. The consortium now boasts of 45+ members representing various aspects of the ecosystem. And the consortium rolled out the 800GbE specification in 2020.
The need for speed is driven by Hyperscale Data Centers that are needed to support the rising data rates required to process high-performance workloads such as cloud computing, deep learning, 5G and video streaming applications. And the data centers are built with scalable network architectures such as the 2-tier leaf-spine architecture shown in the figure below.
Figure: Leaf-and-spine Architecture
The leaf-spine architecture requires massive interconnects as each leaf switch fans-out to every spine switch, maximizing connectivity between servers. This in turn is driving changes in Ethernet interconnects operating at 400Gb/s and 800Gb/s. The move toward 800 Gb/s Ethernet promises not only power savings but also area savings thereby increasing interconnect densities.
Design Realm Challenges
Designs switched from NRZ signaling to PAM4 signaling to support data rates beyond 25Gb/s. Designing for high speeds using NRZ signaling was already challenging. PAM4 signaling is much more sensitive to noise, reflections, non-linearities and baseline wander. Receiver design is much more complicated.
A typical challenge when designing with the multi-layer Ethernet protocol is ensuring that the MAC, PCS, and the physical medium attachment (PMA) sublayers deliver the optimal performance and latency once integrated. At 800G, it becomes even more critical for the Datapath to be as efficient as possible to ensure the lowest latency. If the different pieces of the Datapath are from different vendors, establishing interoperability can be a tough task, particularly since 800G Ethernet has not yet been standardized by IEEE.
In view of the design realm challenges above and a fast-evolving Ethernet standard, the choice of Ethernet IP blocks and supporting software becomes very critical. A vendor who invests in bringing a complete portfolio of technology assets would be a good choice. A vendor who actively participates in the Ethernet Technology Consortium forum would have the potential to get a head start in implementing and rolling out updates to their offerings.
Synopsys’ Complete 800G Ethernet Offerings
Synopsys provides a complete 200G/400G/800G Ethernet IP solution. Synopsys’ DesignWare® Ethernet IP Solutions are IEEE-compliant and have undergone extensive third-party interoperability testing and certification, reducing integration risks, accelerating time-to-market, and enabling its customers to focus on product differentiation.
The portfolio includes:
- Configurable controllers and silicon-proven PHYs for speeds up to 400G/800G
- Verification IP
The Ethernet Controller IP portfolio for 200G/400G and 800G Ethernet complements its 112G/56G Ethernet PHY IP solutions in advanced FinFET processes, which enables Ethernet interconnects up to 800G. Synopsys’ integrated Ethernet PHY IP includes the PCS, PMA, PMD and auto negotiation functionality, enabling faster adoption of the latest 800Gb/s and 400Gb/s Ethernet.
For more details, please click here to go to Ethernet DesignWare page.
Synopsys offers the industry’s first verification IP (VIP) and universal verification methodology (UVM) source code test suite for Ethernet 800G. Synopsys VC VIP can switch speed configurations dynamically at run time and includes an extensive and customizable set of frame generation and error injection capabilities. In addition, source code UNH-IOL test suites are available for key Ethernet features and clauses, allowing teams to quickly jumpstart their own custom testing and accelerate verification closure.
For more details of Ethernet Verification IP, please click here.
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