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Enabling 3D-IC Integration

Enabling 3D-IC Integration
by Daniel Nenni on 07-10-2012 at 9:00 pm

As 2D device scaling becomes impractical, 3D-IC integration is emerging as the natural evolution of semiconductor technology; it is the convergence of performance, power and functionality. Some of the benefits of 3D-IC, such as increasing complexity, improved performance, reducing power consumption and decreasing footprints, are proven and readily understood. Other reported benefits, such as improving time-to-market, lowering risk and lowering cost, still need to be realized before 3D-ICs become a commercially viable alternative to traditional 2D architectures. The availability of Synopsys’ silicon-proven tools and IP is an important contribution to deploying 3D-IC integration technology in the semiconductor industry.

Web event: Enabling 3D-IC Integration
Date: July 18, 2012
Time:10:00 AM PDT

Duration: 45 minutes + Q&A

In this webinar, a guest speaker from Xilinx will introduce the challenges of designing for large capacity and performance and how Xilinx is innovating using Stacked Silicon Interconnect technology to deliver higher levels of integration and flexibility in their FPGA products

Speakers:


Steve Smith

Senior Director, 3D-IC Strategy and Marketing, Synopsys

Steve Smith is currently responsible for Synopsys’ 3D-IC strategy and marketing. He has been with Synopsys for 15 years, having served in various functional verification and design implementation marketing roles. He has worked in the EDA and computer industries for more than 30 years in a variety of senior positions including marketing, applications engineering and software development.


Shankar Lakka

Director of IC Design, Full-Chip FPGA Integration Group, Xilinx

Shankar Lakka is the Director of IC Design in the Full-chip FPGA Integration Group at Xilinx. He has been at Xilinx for more than 16 years, and has held various positions in the CPLD and FPGA divisions and led multiple projects across multiple sites. Shankar recently led the design and full-chip integration of Xilinx SSI devices. He holds 14 U.S. patents.


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