New Product for In-System Test

The annual ITC event is happening this week in San Diego as semiconductor test professionals gather from around the world to discuss their emerging challenges and new approaches, so last week I had the opportunity to get an advance look at something new from Siemens named Tessent In-System Test software. Jeff Mayer, Product Manager, Tessent Logic Test Products brought me up to speed on this new product announcement.

Jeff explained how customers in two markets are converging on the same goals to detect premature device failures, monitor health of aging devices, plus guard against Silent Data Errors (SDE) and Silent Data Corruption (SDC). The two markets and their test approaches are:

Safety & Security – Automotive

• Logic BIST for in-system test
• Embedded deterministic test for manufacturing quality
• Beginning to adopt advanced technology nodes

Quality – Networking, Data Center

• Beginning to adopt in-system test
• Embedded deterministic test for manufacturing quality
• Already using advanced technology nodes

Data centers desire to extend the lifetime of their investments, because it’s just too costly to continuously upgrade the compute infrastructure. An emerging challenge with HPC and data centers is the challenge of Silent Data Errors as reported by Facebook, Google and Intel, because they are related to PVT variations and the workloads being run, which are difficult to reproduce. HPC vendors don’t want to take their servers offline for testing, so they opt to do testing during scheduled maintenance times.

In-system testing is required to ensure reliable electronic operation over the lifetime of a product, by considering semiconductor device issues like:

• Incomplete test coverage
• Small delay faults
• Subtle defects
• Test escapes caused by test marginalities
• Early-life failures
• Random failures
• Silicon aging

Tessent In-System Test

What Siemens has created is a new In-System Test Controller placed as an IP block inside your SoC, enabling in-system deterministic test with the Tessent Streaming Scan Network (SSN) software.

This new ISTC block supports all Tessent MissionMode features for IJTAG and BIST instruments. Your test data is delivered through the AXI or APB system bus, which connects to functional interfaces like PCIe or USB. This new approach can target specific cell-internal and aging defects using high-quality, deterministic patterns. You can even change your test content in the field, targeting learned defectivity rates through the silicon lifecycle. The Tessent In-System Test (IST) is a superset of Tessent MissionMode, so here’s a more detailed view of how that all connects.

Summary

Safety-minded customers are adopting advanced technology nodes, and quality-minded customers want to leverage existing on-chip IP for in-system test, so both markets benefit from in-system test methodologies. Semiconductor device failures can be detected using in-system and in-field monitoring for errors. Combining Tessent In-System Test with Tessent Streaming Scan Network and Tessent TestKompress is a proven way to detect test escapes in-system and in-field.

There’s a live webinar on this topic of applying manufacturing quality test patterns direct to a design, leveraging the benefits of deterministic test over transitional in-system test methods. The webinar is on November 19^th.

At ITC there are customers of this new technology presenting their initial results in a paper and a poster session, and silicon is already out, with more tape-outs underway. Like other Tessent products, there is no royalty for using this test IP. If your team already uses SSN, then you can quickly evaluate adding IST by talking to your local AE and AM team.

Related Blogs

• Enabling Imagination: Siemens’ Integrated Approach to System Design
• Designing for Security for Fully Autonomous Vehicles
• Tessent SSN Enables Significant Test Time Savings for SoC ATPG
• DFT Moves up to 2.5D and 3D IC
• Efficient Memory BIST Implementation
• Balancing Test Requirements with SOC Security