For Halloween this year, why not tell your embedded software debug horror stories at ARM TechCon? Mentor will have several campfire sessions you should consider attending, but here my Halloween thread breaks down. These three sessions are all quite cheery.
This one, Software Debug on ARM Processors in Emulationis on using emulation for software debug. Emulation gives the software team earlier access to the design, but the software needs to be debugged. Emulators allow access to signals around the core that are not accessible in the final device, and these can used to debug and trace the processor. In this session, Russ Klein, a Technical Director in the Mentor emulation division, will talk about the different debug approaches available, trade-offs involved in each approach, and how and when they can be most effectively applied during the design cycle. Russ has been developing verification and debug solutions that span the boundaries between hardware and software for over 20 years, so believe that he’s an expert.
As the ARM architecture scales to meet tomorrows requirements, coherent caching becomes a critical component of an ARM system. In the session Cache in Your Chips: Coherence in an ARM SoC Environment, Mentor’s verification architect Andy Meyer, looks at the issues around multiple caches, why coherence is useful, and gives detailed examples of how coherent caches work in the ACE and CHI AMBA protocols. Andy goes over what to consider in your design from a verification and performance viewpoint, plus stimulus generation methods, metrics capture, making sense of performance and coverage analysis. Andy is somewhat of a celebrity; among his accomplishments in the field, he was one of the developers of OVM, and is the author of “Principles of Functional Verification.”
Another session, Pre-silicon Bringup, Debug and Analysis of Embedded Software on ARM based SoCs looks at how software-driven verification uncovers deep hardware software faults and deadlocks by incorporating trace-based debug and analysis techniques. These faults discovered at this early stage would not have been otherwise found using standard hardware verification methods. This session is given by Mentor Graphics’ own Shabtay Matalon. He has been active in system-level design and verification tools and methodologies for over 20 years.
But don’t limit yourself to those three sessions, Mentor has nine other sessions at ARM TechCon. You can see them all at Mentor’s ARM TechCon page. Mentor also has an on mentor.com”]ARM Solutions microsite where you can see their company-wide ARM support.Share this post via: