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5 of the Top 20 Semiconductor Suppliers to Show Double-Digit Gains in 2016!

5 of the Top 20 Semiconductor Suppliers to Show Double-Digit Gains in 2016!
by Daniel Nenni on 11-15-2016 at 4:00 pm

Semiconductor Market Researcher IC Insights released an update to the 2016 semiconductor sales forecast which is interesting on many different levels. It really has been an exciting year for the semiconductor industry, absolutely. Two of the stars of this year’s report happen to be two of my favorite fabless companies, Nvidia… Read More


Foundry CAPEX Jumped from 17% to 37% of LAM Business

Foundry CAPEX Jumped from 17% to 37% of LAM Business
by Robert Maire on 10-23-2016 at 4:00 pm

Lam- in line qtr but guides above street over near term. As with ASML, foundry is driver with subdued memory, The Math implies biz peaking-Looking for DRAM in 2017.

Lam reported another great, record quarter, more or less in line with expectations with revenues coming in at $1.632B and shipments of $1.708B, generating EPS of $1.81.… Read More


Webinar Offers View into TSMC IP Design Methodology

Webinar Offers View into TSMC IP Design Methodology
by Tom Simon on 10-21-2016 at 12:00 pm

Standard cell and memory IP are key enablers for new process node availability. These two items must be in place early and be completely ready for a process node to scale to volume. Development of both leaves no room for error and they require the highest performance possible. Foundries are extremely focused on this and spend a lot… Read More


Will TSMC be alone at 10nm and 7nm?!?!?

Will TSMC be alone at 10nm and 7nm?!?!?
by Daniel Nenni on 10-01-2016 at 7:00 am

Now that the dust has settled let’s talk about the recent TSMC OIP Ecosystem Forum. This was the 6[SUP]th[/SUP] annual OIP which hosts more than 1,000 attendees from TSMC’s top customers and partners. Presenting this year were TSMC VP and CTO Dr. Jack Sun, TSMC VP of R&D Dr. Cliff Hou, and ARM EVP of Incubation Businesses Dr. Dipesh… Read More


Top 5 Highlights from the 2016 TSMC Open Innovation Platform Forum

Top 5 Highlights from the 2016 TSMC Open Innovation Platform Forum
by Tom Dillinger on 09-26-2016 at 7:00 am

Recently, TSMC conducted their annual Open Innovation Platform forum meeting in San Jose. Although TSMC typically eschews a theme for the forum, David Keller, EVT TSMC North America, used a phrase in his opening remarks that served as a foundation for the rest of the meeting – “celebrate the way we collaborate”.

The forum begins… Read More


ESL Architectural Power Estimation Support from TSMC — yes, TSMC

ESL Architectural Power Estimation Support from TSMC — yes, TSMC
by Tom Dillinger on 09-22-2016 at 11:00 am

Electronic system level (ESL) modeling for system architecture exploration is rapidly gaining momentum. The simulation performance requirements for hardware/software co-design are demanding — an abstract model for SoC IP cores is required. Typically, soft IP will include a number of model configuration parameters.… Read More


TSMC 16nm, 10nm, 7nm, and 5nm Update!

TSMC 16nm, 10nm, 7nm, and 5nm Update!
by Daniel Nenni on 09-13-2016 at 4:00 pm

Word on the street is that TSMC is on schedule with 16FFC, 10nm and 7nm, which is a very big deal for the fabless semiconductor ecosystem. As Scotten Jones has illustrated in the graphic below, for the first time in the history of the semiconductor industry a pure-play foundry (TSMC) will have the process lead over Intel. And this is… Read More


TSMC and Solido to Share Experiences with Managing Variation in Webinar

TSMC and Solido to Share Experiences with Managing Variation in Webinar
by Tom Simon on 09-10-2016 at 7:00 am

TSMC knows better than anyone the effect that variation can have at advanced process nodes. Particularly in memory designs and in standard cell designs, variation has become a very critical because of its effects on yield and because of the high-cost of compensating for it. Smaller feature sizes combined with lower voltage thresholds… Read More


NVIDIA looks inside Parker and automotive-grade

NVIDIA looks inside Parker and automotive-grade
by Don Dingee on 09-07-2016 at 4:00 pm

‘Parker’ is a fascinating name for a chip designed for autonomous vehicles – more likely, the project name was pulled off a map as a bedroom community near Denver. First highlighted on the roadmap in 2013, and advertised as inside the DRIVE PX 2 platform shown at CES 2016, NVIDIA revealed some details of Parker at Hot Chips 2016.… Read More


The 2016 Leading Edge Semiconductor Landscape

The 2016 Leading Edge Semiconductor Landscape
by Scotten Jones on 09-03-2016 at 7:00 am

The leading edge semiconductor logic landscape has in recent years collapsed to just four companies. The following is a summary of what is currently known about each company’s plans and how they compare. ASML has analyzed many logic nodes and developed a formula that normalizes processes to a “standard node”.… Read More