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TSMC Banner 2023
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Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!

Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!
by Scotten Jones on 03-29-2017 at 4:00 pm

Yesterday I attended Intel’s manufacturing day. This was the first manufacturing day Intel has held in three years and according to Intel their most in depth ever.

Nodes must die
I have written several articles comparing process technologies across the leading-edge logic producers – GLOBALFOUNDRIES, Intel, Samsung… Read More


Top 10 Updates from the TSMC Technology Symposium, Part I

Top 10 Updates from the TSMC Technology Symposium, Part I
by Tom Dillinger on 03-22-2017 at 7:00 am

Last week, TSMC held their 23rd annual technical symposium in Santa Clara. In the Fall, TSMC conducts the OIP updates from EDA/IP partners and customers. The theme of the Spring symposium is solely on TSMC’s technology development status and the future roadmap. Indirectly, the presentations also provide insight into … Read More


TSMC Talks About 22nm, 12nm, and 7nm EUV!

TSMC Talks About 22nm, 12nm, and 7nm EUV!
by Daniel Nenni on 03-16-2017 at 12:00 pm

The TSMC Symposium was jam-packed this year with both people and information. I had another 60 minutes of fame in the Solido booth where I signed 100 books, thank you to all who stopped by for a free book and a SemiWiki pen. SemiWiki bloggers Tom Dillinger and Tom Simon were also there so look for more TSMC Symposium blogs coming in the… Read More


TSMC Design Platforms Driving Next-Gen Applications

TSMC Design Platforms Driving Next-Gen Applications
by Daniel Nenni on 03-03-2017 at 7:00 am

Coming up is the 23rd annual TSMC Technology Symposium where you can get first-hand updates on advanced and specialty technologies, advanced backend capabilities, future development plans, and network with hundreds of TSMC’s customers and partners. This year the Silicon Valley event kicks off at the Santa Clara Convention… Read More


EUV is NOT Ready for 7nm!

EUV is NOT Ready for 7nm!
by Daniel Nenni on 02-27-2017 at 8:00 am

The annual SPIE Advanced Lithography Conference kicked off last night with vendor sponsored networking events and such. SPIE is the international society for optics and photonics but this year SPIE Advanced Lithography is all about the highly anticipated EUV technology. Scotten Jones and I are at SPIE so expect more detailedRead More


AAPl Vs QCOM Who wins?

AAPl Vs QCOM Who wins?
by Daniel Nenni on 01-26-2017 at 7:00 am

Things just got interesting in the iPhone supply chain with the $1B AAPL Vs QCOM legal action filed this week. For the life of me I could not understand why Apple second sourced the normally QCOM modem in the iPhone 7. It caused quite a stir in the technical community but we could only surmise that it was a price issue on the business side.… Read More


DARPA Flex Logix and TSMC!

DARPA Flex Logix and TSMC!
by Daniel Nenni on 01-23-2017 at 10:00 am

When I first saw emerging semiconductor IP company Flex Logix actively involved with TSMC I knew something big was coming and boy was I right. DARPA announced today that an agreement is in place with Flex Logix to develop EFLX eFPGA technology on TSMC 16FFC for use by companies or Government agencies designing chips for the US Government.… Read More


Another Interesting Thing From TSMC!

Another Interesting Thing From TSMC!
by Daniel Nenni on 01-21-2017 at 7:00 am

As I mentioned in my previous post, the TSMC investor call this month was very interesting and Morris Chang was in fine form during the Q&A. As a semiconductor professional I think some of the questions are ridiculous but maybe they have value to the financial people. This one question from Randy, who I think is very astute, is … Read More


Fan-Out Wafer Level Processing Gets Boost from Mentor TSMC Collaboration

Fan-Out Wafer Level Processing Gets Boost from Mentor TSMC Collaboration
by Mitch Heins on 01-20-2017 at 12:00 pm

I caught up with John Ferguson of Mentor Graphics this week to learn more about a recent announcement that TSMC has extended its collaboration with Mentor in the area of Fan-Out Wafer Level Processing (FOWLP).

In March of last year Mentor and TSMC announced that they were collaborating on a design and verification flow for TSMC’s… Read More