WP_Term Object
(
    [term_id] => 51
    [name] => RISC-V
    [slug] => risc-v
    [term_group] => 0
    [term_taxonomy_id] => 51
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 146
    [filter] => raw
    [cat_ID] => 51
    [category_count] => 146
    [category_description] => 
    [cat_name] => RISC-V
    [category_nicename] => risc-v
    [category_parent] => 178
    [is_post] => 
)
            
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WP_Term Object
(
    [term_id] => 51
    [name] => RISC-V
    [slug] => risc-v
    [term_group] => 0
    [term_taxonomy_id] => 51
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 146
    [filter] => raw
    [cat_ID] => 51
    [category_count] => 146
    [category_description] => 
    [cat_name] => RISC-V
    [category_nicename] => risc-v
    [category_parent] => 178
    [is_post] => 
)

Software Developers Turn to CacheQ for Multi-Threading CPU Acceleration

Software Developers Turn to CacheQ for Multi-Threading CPU Acceleration
by Lauro Rizzatti on 06-07-2021 at 10:00 am

image001 6

Three-year old CacheQ, founded by two former Xilinx executives and a clever group of engineers, produces a distributed heterogenous compute development environment targeting software developers with limited knowledge of hardware architecture.

The promise of compiler tools for heterogeneous compute systems intrigued… Read More


Enhancing RISC-V Vector Extensions to Accelerate Performance on ML Workloads

Enhancing RISC-V Vector Extensions to Accelerate Performance on ML Workloads
by Kalar Rajendiran on 05-17-2021 at 10:00 am

SuperCharge ML Performance

During the week of April 19th, Linley Group held its Spring Processor Conference 2021. The Linley Group has a reputation for convening excellent conferences. And this year’s spring conference was no exception. There were a number of very informative talks from various companies updating the audience on the latest research and… Read More


Why Near-Threshold Voltage is an Excellent Choice for Hearables

Why Near-Threshold Voltage is an Excellent Choice for Hearables
by Lauri Koskinen on 05-05-2021 at 6:00 am

blog part 3 energy frugality graphic FINAL 1

In the previous blogs on this topic, we’ve seen that utilizing near-threshold voltage (NTV) saves incredible amounts of energy, theoretically up to 10x and in practice from 2x to 4x. But there is a price which makes some applications more suited for NTV than others. This is due to the inevitable performance (speed) loss of NTV as … Read More


RISC-V is Building Momentum

RISC-V is Building Momentum
by Adrienne Downey on 04-05-2021 at 10:00 am

RISC V END MKTS

The semiconductor intellectual property (SIP) market is an integral part of the semiconductor industry. Third-party IP has propelled the industry, opening the door for many new products from start-ups to established IDMs. Enabling increasingly complex devices, reducing the cost of product development and reducing the time… Read More


Enabling Edge AI Vision with RISC-V and a Silicon Platform

Enabling Edge AI Vision with RISC-V and a Silicon Platform
by Tom Simon on 03-15-2021 at 10:00 am

AI Chipset Market

AI vision processing moving to the edge is an undeniable industry trend. OpenFive, the custom silicon business unit of SiFive, discusses this trend with compelling facts in their recent paper titled “Enabling AI Vision at the Edge.” AI vision is being deployed in many applications, such as autonomous vehicles, smart cities, … Read More


ESL Expertise when You Need It. Spinning Up Faster

ESL Expertise when You Need It. Spinning Up Faster
by Bernard Murphy on 12-30-2020 at 6:00 am

CircuitSutra min

System-level expertise, once the domain a few architecture specialists, is now shouldering its way everywhere into chip design and verification. In virtual modeling together with OS and application software certainly. That now couples into mixed-level system-verification, using different levels of abstraction for different… Read More


RISC-V SDKs, from IP Vendor or a Third Party?

RISC-V SDKs, from IP Vendor or a Third Party?
by Bernard Murphy on 08-12-2020 at 6:00 am

RISC V min

Like many of us, I’m a fan of open-source solutions. They provide common platforms for common product evolution, avoiding a lot of unnecessary wheel re-invention, over and over again. Linux, TensorFlow, Apache projects, etc., etc. More recently the theme moved into hardware with OpenCores and now the RISC-V ISA. All good stuff.… Read More


Low Power and RISC-V Talks at DAC2020, Hosted by Mentor

Low Power and RISC-V Talks at DAC2020, Hosted by Mentor
by Bernard Murphy on 07-28-2020 at 6:00 am

low battery

I’m going to get to low power and RISC-V, but first I’m trying out virtual DAC this year. Seems to be working smoothly, aside from some glitches in registration. But maybe that’s just me – I switched email addresses in the middle of the process. Some sessions are live, many pre-recorded, not quite the same interactive experience… Read More


Interface IP Category to Overtake CPU IP by 2025?

Interface IP Category to Overtake CPU IP by 2025?
by Eric Esteve on 07-09-2020 at 6:00 am

Top 5 Forecast 2020 2024

The Interface Design IP market explodes, growing by 18% in 2019, with $870 million, when CPU IP category grew by 5% at $1,460 million. In fact, Interface IP market is forecasted to sustain high growth rate for the next five years, as calculated by IPnest in the “Interface IP Survey 2015-2019 & Forecast 2020-2024”, to reach $1,800… Read More


Webinar: Build Your Next HBM2/2E Chip with SiFive

Webinar: Build Your Next HBM2/2E Chip with SiFive
by Mike Gianfagna on 05-04-2020 at 10:00 am

Screen Shot 2020 05 03 at 12.09.58 PM

I have been watching the trend for quite some time now that many advanced FinFET designs today are actually 2.5D systems in package. All of these 2.5D silicon interposer-based designs have high-bandwidth memory (HBM) stacks on board.  Often there are multiple memory stacks in both 4-high and 8-high configurations. If you follow… Read More