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RISC-V
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The SiFive Tech Symposiums are Heading To Portland and Seattle Next Week!

The SiFive Tech Symposiums are Heading To Portland and Seattle Next Week!
by Swamy Irrinki on 10-17-2019 at 2:00 pm
Categories: IP, RISC-V, SiFive

Image RemovedWe’re confirming seats in Portland and Seattle for the Pacific Northwest leg of our worldwide 2019 SiFive Tech Symposiums. We are pleased to have Mentor, A Siemens Business as our co-host, and Lauterbach, a leader in microprocessor development tools, as our partner in both cities. The Portland symposium will take… Read More

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SiFive Continues to Foster RISC-V in the Middle East With Tech Symposiums

SiFive Continues to Foster RISC-V in the Middle East With Tech Symposiums
by Swamy Irrinki on 10-05-2019 at 8:00 am
Categories: IP, RISC-V, SiFive

Workshops Coming to Istanbul, Amman, Cairo and Abu Dhabi

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SiFive is continuing its tour through the Middle East with highly educational RISC-V Tech Symposiums and Workshops in the key locations of Istanbul, Amman and Cairo. These cities are some of the most technologically advanced in the region, and we are eager … Read More

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SiFive to Host its Tech Symposium on RISC-V in Israel on September 5

SiFive to Host its Tech Symposium on RISC-V in Israel on September 5
by Swamy Irrinki on 09-03-2019 at 10:00 pm
Categories: IP, RISC-V, SiFive

There’s no question that the RISC-V ISA is revolutionizing the semiconductor ecosystem around the world. We see Israel as the epicenter of RISC-V based development and innovation in the Middle East. For the second year in a row, SiFive will be hosting its Tech Symposium on RISC-V in Israel to help foster the growth and momentum that  Read More

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SiFive Fosters RISC-V Collaboration and Education in India and Bangladesh Via Symposiums, Tutorials and Workshops

SiFive Fosters RISC-V Collaboration and Education in India and Bangladesh Via Symposiums, Tutorials and Workshops
by Swamy Irrinki on 07-27-2019 at 4:00 am
Categories: Events, IP, RISC-V, SiFive

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Last year we hosted several SiFive Tech Symposiums in India to help promulgate the RISC-V ecosystem in the region. The enthusiastic reception from those in industry as well as students and faculty at India’s most esteemed universities was inspiring. This July and August, we’re bringing the SiFive Tech Symposium… Read More

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2019 GSA Silicon Summit and SiFive

2019 GSA Silicon Summit and SiFive
by Daniel Nenni on 06-28-2019 at 8:00 am
Categories: Events, IP, RISC-V, SiFive
2 Comments

Naveed Sherwani, President and CEO of SiFive, did the keynote for this year’s Silicon Summit. This is one of the premier events for the C level executives in Silicon Valley, absolutely. Naveed is one of the top visionaries for the semiconductor industry and he certainly did not disappoint this time or any other time in my experience.… Read More

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Considering SiFive: What Should I Get to Implement a RISC-V Core?

Considering SiFive: What Should I Get to Implement a RISC-V Core?
by Randy Smith on 06-17-2019 at 10:00 am
Categories: IP, RISC-V, SiFive

Image RemovedI have an old weathered leather-clad black notebook with a National Semiconductor logo on its face that I have used since 2001. It has sentimental value to me. First, it reminds me of where I was on 9/11, having breakfast with a group of attendees to National Semiconductor’s executive event in Laguna Niguel, CA. We were… Read More

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#56thDAC SerDes, Analog and RISC-V sessions

#56thDAC SerDes, Analog and RISC-V sessions
by Eric Esteve on 06-14-2019 at 5:00 am
Categories: Events, IP, IPnest, RISC-V, Semiconductor Services
2 Comments

The good news is that the next five DAC events will take place in Moscone Center in San Francisco! If going to Las Vegas from the Bay area is an easy trip, coming from Europe to Las Vegas makes it a 24+hours journey… One obvious consequence was the poor attendance to the exhibition floor. But let’s be positive and notice that the number… Read More

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The RISC-V Revolution is Sweeping Across the APAC Region and Australia

The RISC-V Revolution is Sweeping Across the APAC Region and Australia
by Daniel Nenni on 06-10-2019 at 9:14 pm
Categories: Events, IP, RISC-V, SiFive

Join SiFive Tech Symposiums in Tokyo, Daejeon, Pangyo, Hsinchu, Singapore and Sydney

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As we make our way around the world meeting and engaging with others in the semiconductor and hardware design community, we are seeing an increased interest in RISC-V based hardware innovation. This is due in large part to the emergence… Read More

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Learning on the Edge Investment Thesis

Learning on the Edge Investment Thesis
by Jim Hogan on 05-20-2019 at 5:00 am
Categories: EDA, RISC-V, Synopsys, TSMC
2 Comments

It is said that it will cost as much as $600M to develop a 5nm chip. At that price, only a few companies can afford to play, and with that amount of cash in, innovation is severely limited.

At the same time, there is a stampede in the artificial intelligence (AI) market where around 60 startups have appeared, many of which have already … Read More

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The SiFive Tech Symposiums are Heading to Six Cities in Europe in May!

The SiFive Tech Symposiums are Heading to Six Cities in Europe in May!
by Daniel Nenni on 05-12-2019 at 4:00 pm
Categories: Events, IP, RISC-V, SiFive

Hello Cambridge, Grenoble, Stockholm, Moscow, Munich and Amsterdam
Our 2019 global symposiums and workshops have been hugely successful in promoting the RISC-V ISA and fostering expansive collaboration within the open-source community. It’s invigorating to see how the worldwide semiconductor ecosystem is energized and… Read More