WP_Term Object
(
    [term_id] => 51
    [name] => RISC-V
    [slug] => risc-v
    [term_group] => 0
    [term_taxonomy_id] => 51
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 173
    [filter] => raw
    [cat_ID] => 51
    [category_count] => 173
    [category_description] => 
    [cat_name] => RISC-V
    [category_nicename] => risc-v
    [category_parent] => 178
    [is_post] => 
)
            
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WP_Term Object
(
    [term_id] => 51
    [name] => RISC-V
    [slug] => risc-v
    [term_group] => 0
    [term_taxonomy_id] => 51
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 173
    [filter] => raw
    [cat_ID] => 51
    [category_count] => 173
    [category_description] => 
    [cat_name] => RISC-V
    [category_nicename] => risc-v
    [category_parent] => 178
    [is_post] => 
)

How Fast Can a Performance Model Actually Be Built?

How Fast Can a Performance Model Actually Be Built?
by Admin on 07-26-2026 at 4:00 pm

SimplEx MicroCircuitSutra Performance Model 2026 07 20 Fig

By Thang Tran, CEO of Simplex Micro and Umesh Sisodia, CEO of CircuitSutra

Performance models have a reputation problem. They’re often treated as a long-lead, high-effort undertaking — something a design team commits to early and then waits on for months before it’s useful. The development of SimplEx Micro’s… Read More


RISC-V Advantage in Accelerator Control Highlights System Verification Challenges

RISC-V Advantage in Accelerator Control Highlights System Verification Challenges
by Bernard Murphy on 07-22-2026 at 6:00 am

Breker synthesis engine

When considering best-fit applications for RISC-V, the appeal of extending the instruction set and competitive pricing for storage and edge applications has been pretty clear. But I have always struggled to understand the appeal in head-on competition with Arm in premium applications such as servers and infrastructure systems.… Read More


COMPUTEX 2026: S2C and Andes Technology Showcase Hardcore “EDA+IP” Synergy for the AI Era

COMPUTEX 2026: S2C and Andes Technology Showcase Hardcore “EDA+IP” Synergy for the AI Era
by Daniel Nenni on 06-25-2026 at 6:00 am

AX66

COMPUTEX 2026 officially concluded under the theme “AI Together,” bringing the global semiconductor and computing ecosystem together to showcase the latest advances in artificial intelligence, HPC, and intelligent systems. While AI accelerators and advanced computing platforms dominated the exhibition floor, one collaboration… Read More


AION Silicon: Architecting Smarter SoCs with RISC-V: Balancing Performance, Flexibility, and Risk

AION Silicon: Architecting Smarter SoCs with RISC-V: Balancing Performance, Flexibility, and Risk
by Daniel Nenni on 06-22-2026 at 10:00 am

AION Silicon Architecting Smarter SoCs with RISC V

As semiconductor complexity accelerates across AI, automotive, and edge computing markets, SoC architecture has become a critical determinant of commercial success. Modern silicon programs must simultaneously achieve aggressive performance-per-watt targets, support evolving workloads, and maintain manageable development… Read More


RISC-V and AI: The Architecture Shift Is Now

RISC-V and AI: The Architecture Shift Is Now
by Daniel Nenni on 06-17-2026 at 10:00 am

RISC V and AI The Architecture Shift Is Now

The semiconductor industry has experienced several defining transitions over the last three decades. We moved from single-core to multicore processors, from ASIC-centric designs to IP-based SoCs, and from monolithic integration to heterogeneous architectures. Today, another transition is underway, one that may ultimately… Read More


Akeana Collaborates with Samsung Electronics, Fast-Tracking RISC-V Customers and Ecosystem for Server and Agentic AI Silicon

Akeana Collaborates with Samsung Electronics, Fast-Tracking RISC-V Customers and Ecosystem for Server and Agentic AI Silicon
by Daniel Nenni on 06-15-2026 at 10:00 am

Akeana Collaborates with Samsung Electronics, Fast Tracking RISC V Customers and Ecosystem for Server and Agentic AI Silicon

The momentum behind RISC-V continues to accelerate as Akeana announced a strategic collaboration with Samsung Electronics aimed at reducing time-to-market for next-generation server and agentic AI silicon. The partnership combines Akeana’s high-performance RISC-V compute platform with Samsung Foundry’s advanced process… Read More


The “New Shift-Left”: Why FPGA Prototyping is the Ultimate RISC-V IP Sandbox

The “New Shift-Left”: Why FPGA Prototyping is the Ultimate RISC-V IP Sandbox
by Daniel Nenni on 05-14-2026 at 10:00 am

Cover pic

In the EDA world, “Shift-Left” has traditionally been a mantra for early software development—booting the OS before the silicon even leaves the fab. But as the RISC-V revolution accelerates, the goalposts have moved. We are seeing the emergence of a “New Shift-Left”, one that focuses on critical architectural… Read More


CEO Interview with Dave Kelf, CEO of Breker Verification Systems

CEO Interview with Dave Kelf, CEO of Breker Verification Systems
by Daniel Nenni on 05-08-2026 at 6:00 am

David Kelf Headshot

In the functional verification space, Breker Verification Systems stands out for its vast and long-standing understanding and ability to solve many of the seemingly intractable complexity challenges, especially in the system space.

I recently talked with Dave Kelf, Breker’s CEO, who has plenty of good news to share about Breker’s… Read More


Architecting Intelligence: The Rise of RISC-V CPUs in Agentic AI Infrastructure

Architecting Intelligence: The Rise of RISC-V CPUs in Agentic AI Infrastructure
by Daniel Nenni on 04-09-2026 at 6:00 am

The rise of RISC V CPUs SiFive

SiFive’s newly announced $400 million Series G financing represents a significant technical inflection point for high-performance RISC-V CPU development targeted at agentic AI data center workloads. The funding, which values the company at $3.65 billion, is specifically intended to accelerate next-generation CPU IP, … Read More


When a Platform Provider Becomes a Competitor: Why Arm’s Silicon Strategy Changes the Incentives

When a Platform Provider Becomes a Competitor: Why Arm’s Silicon Strategy Changes the Incentives
by Admin on 04-07-2026 at 10:00 am

SemiWiki

Marc Evans, Director of Business Development & Marketing, Andes Technology USA

I work at a RISC-V IP company, and I genuinely root for Arm — probably more than most people in my position would admit. Not because I’m confused about who competes with whom, but because Arm’s best move for their shareholders is also… Read More