The current leading edge of advanced lithography nodes (e.g., “7nm” or “1Z nm”) features pitches (center-center distances between lines) in the range of 30-40 nm. Whether EUV (13.5 nm wavelength) or ArF (193 nm wavelength) lithography is used, one thing for certain is that the minimum imaged pitch … Read More
LithoVision – Economics in the 3D Era
Each year on the Sunday before the SPIE Advanced Lithography Conference, Nikon holds their LithoVision event. This year I had the privilege of being invited to speak for the third consecutive year, unfortunately, the event had to be canceled due to concerns over the COVID-19 virus but by the time the event was canceled I had already… Read More
Coronavirus Chops SPIE Litho EUV Conference
Corona Curtails already quiet SPIE Litho conference
Our best guess is that attendance was off by 30% from last years SPIE conference due to a lack of travelers from many Asian areas obviously out of Corona fear. Even Intel, which is a few miles away was a virtual no-show with a mass cancellation.
More importantly, virtually all after… Read More
ASML “A Swing to Memory Looms” Nice performance while awaiting Memory bounce
- Good Q4 & 2019 despite weak memory
- 2020 will be up year but memory an unknown
- EUV ramp is on track – no China or memory impact
ASML reported sales of 4B Euros and a nice gross margin of 48% resulting in 2.70 Euros per share in earnings. Orders came in at 2.4B
IEDM 2019 – Imec Interviews
Imec is one of the premier semiconductor research organizations and at IEDM they presented dozens of papers. I had the opportunity to see several of the papers presented and interview 3 of Imec’s researchers.
Jan Van Houdt, DMTS ferroelectric and exploratory memory
I have had very interesting discussions with Imec researchers… Read More
ASML EUV China Chip Equip Risk
- Is ASML first clandestine shot in US war on China chips?
- Will the action extend further to other chip equip cos?
- China chip cold conflict warming up?
It would appear from a Reuters report yesterday that a behind the scenes “cold war” between the US and China in the chip business has just been exposed and has the potential… Read More
IEDM 2019 – Applied Materials panel EUV Recap
On Tuesday night of IEDM, Applied Materials held a panel discussion “The Future of Logic: EUV is Here, Now What?”. The panelists were: Regina Freed, managing director at Applied Materials as the moderator, Geoffrey Yeap, senior director of advanced technology at TSMC, Bala Haran, director of silicon process research at IBM, … Read More
ASML – In Line Qtr but big bookings – Logic Strong! Memory ? EUV?
ASML in line QTR with big Orders
Near term slippage w long term upside
Logic is strong but memory recovery unknown
EUV is finally a reality/commercialized
In line quarter- supplier slippage expected in Q4
Results were revenues of Euro 3B and EPS of Euro 1.49, more or less in line with earnings estimate if a tad bit light in revenue. … Read More
SEMICON West 2019 – Day 1 – Imec
On Monday, July 8th Imec held a technology forum ahead of Semicon West. I saw the papers presented and interviewed three of the authors. The following is a summary of what I feel are the keys points of their research.
Arnaud Furnemont
Arnaud Furnemont’s talk was titled “From Technology Scaling to System Optimization”. Simple 2D … Read More
SPIE Advanced Lithography Conference – Imec design papers
At the SPIE Advanced Lithography Conference Imec presented several design papers and I have had the opportunity to review the papers and speak with the authors. In this summary I am going to address three emerging areas in order of when I think they may be implemented from soonest to latest.
Specifically, I will discuss:
- Buried Power
CHIPS Act dies because employees are fired – NIST CHIPS people are probationary