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Whether EUV or DUV doesn’t matter at 20 nm pitch
The International Roadmap for Devices and Systems, 2022 Edition, indicates that the “2nm” node due in 2025 (this year) has a minimum (metal) half-pitch of 10 nm [1]. This is, in fact, less than the resolution of a current state-of-the-art EUV system, with a numerical aperture
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The occurrences of notorious stochastic defects in EUV lithography have resulted in CD or corresponding dose windows with the lower and higher bounds being characterized as “cliffs” [1-3], since the defect density increases exponentially when approaching these bounds. The defects at lower doses have been attributed to the… Read More
Conventionally, the resolution limit of a lithography system with wavelength l and numerical aperture NA is given by half-pitch = 0.25 wavelength/NA. With the use of EUV lithography, however, electron blur needs to be added [1]. The impact of this blur is to reduce the contrast [2]. Blur reduces the modulation amplitude by a factor… Read More
Previously, I had indicated how detrimental stochastic effects at pitches below 50 nm should lead to reconsidering the practical resolution limit for EUV lithography [1]. This is no exaggeration, as stochastic effects have been observed for 24 nm half-pitch several years ago [2,3]. This then leads to the question of whether … Read More
Pupil fill tradeoff again
EUV lithography continues to be plagued by its stochastic nature.
This stochastic nature is most clearly portrayed by the random fluctuation of the absorbed photon number at a given location. For example, consider an absorbed dose of 10 mJ/cm2 amounts to 6.8 photons of energy 92 eV absorbed in a square … Read More
- Investors finally realize the upcycle isn’t as strong as stocks indicated
- Industry Bifurcation between AI & rest of industry continues
- China spending risk/overhang finally kicks in
- AI is super strong, majority of chips remain weak- Invest accordingly
ASML simply states chip industry reality that investors have
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At IEDM 2019, TSMC revealed two versions of 5nm standard cell layouts: a 5.5-track DUV-patterned version and a 6-track EUV-patterned version [1]. Although the metal pitches were not explicitly stated, later analyses of a 5nm product, namely, Apple’s A15 Bionic chip, revealed a cell height of 210 nm [2]. For the 6-track … Read More
The latest significant development in EUV lithography technology is the arrival of High-NA systems. Theoretically, by increasing the numerical aperture, or NA, from 0.33 to 0.55, the absolute minimum half-pitch is reduced by 40%, from 10 nm to 6 nm. However, for EUV systems, we need to recognize that the EUV light (consisting … Read More
On Friday April 12th Intel held a press briefing on their adoption of High NA EUV with Intel fellow and director of lithography Mark Phillips.
In 1976 Intel built Fab 4 in Oregon, the first Intel fab outside of California. With the introduction of 300mm Oregon became the only development site for Intel with large manufacturing, development,… Read More
There has been much interest in Huawei’s and SMIC’s plans for 5nm production in the near future. Since there is no use of EUV in China, immersion DUV lithography (with a 76 nm pitch resolution) is expected to be used along with pitch quartering to achieve pitches in the 20-30 nm range expected for the 5nm and 3nm nodes [1].… Read More
CHIPS Act dies because employees are fired – NIST CHIPS people are probationary