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The Impact of UCIe on Chiplet Design: Lowering Barriers and Driving Innovation

The Impact of UCIe on Chiplet Design: Lowering Barriers and Driving Innovation
by Kalar Rajendiran on 08-15-2024 at 6:00 am

Comparative Analysis of Chiplet Interconnect Standards (Physical Layer)

The semiconductor industry is experiencing a significant transformation with the advent of chiplet design, a modular approach that breaks down complex chips into smaller, functional blocks called chiplets. A chiplet-based design approach offers numerous advantages, such as improved performance, reduced development … Read More


First third-party ISO/SAE 21434-certified IP product for automotive cybersecurity

First third-party ISO/SAE 21434-certified IP product for automotive cybersecurity
by Don Dingee on 08-14-2024 at 6:00 am

ISO/SAE 21434 and UNECE WP.29 R155

Increased processing and connectivity in automobiles are cranking up the priority for advanced cybersecurity steps to keep roads safe. Electronic vehicle interfaces, including 5G/6G, Bluetooth, Wi-Fi, GPS, USB, CAN, and others, offer convenience features for drivers and passengers, but open numerous attack vectors for… Read More


PieceMakers HBLL RAM: The Future of AI DRAM

PieceMakers HBLL RAM: The Future of AI DRAM
by Joe Ting on 08-12-2024 at 6:00 am

PieceMaker Memory

PieceMakers, a fabless DRAM product company, is making waves in the AI industry with the introduction of a new DRAM family that promises to outperform traditional High Bandwidth Memory (HBM). The launch event featured industry experts, including a representative from Samsung, highlighting the significance of this innovation.… Read More


Mitigating AI Data Bottlenecks with PCIe 7.0

Mitigating AI Data Bottlenecks with PCIe 7.0
by Kalar Rajendiran on 08-05-2024 at 6:00 am

Mitigating AI Data Bottlenecks with PCIe 7.0 LinkedIn Event

During a recent LinkedIn webcast, Dr. Ian Cutress, Chief Analyst at More than Moore and Host at TechTechPotato, and Priyank Shukla, Principal Product Manager at Synopsys, shared their thoughts regarding the industry drivers, design considerations, and critical advancements in compute interconnects enabling data center… Read More


CAST, a Small Company with a Large Impact on Many Growth Markets #61DAC

CAST, a Small Company with a Large Impact on Many Growth Markets #61DAC
by Mike Gianfagna on 07-30-2024 at 6:00 am

DAC Roundup – CAST, a Small Company with a Large Impact on Many Growth Markets

Semiconductor IP has continued to grow as a market, and it was clearly a star performer at #61DAC.  We all know the large suppliers of IP for semiconductors, but the market is actually quite diverse, with many players supporting many applications.  I had a chance to meet with two executives from CAST, a company with a remarkably … Read More


Alphawave Semi Tapes Out Industry-First, Multi-Protocol I/O Connectivity Chiplet for HPC and AI Infrastructure

Alphawave Semi Tapes Out Industry-First, Multi-Protocol I/O Connectivity Chiplet for HPC and AI Infrastructure
by Kalar Rajendiran on 07-29-2024 at 6:00 am

Industry First, Multi Protocol IO Connectivity Chiplet

In the rapidly evolving landscape of high-performance computing (HPC) and artificial intelligence (AI), the demand for increased processing power, efficiency, and scalability is ever-growing. Traditional monolithic chip designs are increasingly unable to keep pace with these demands, leading to the emergence of chiplets… Read More


Empowering AI, Hyperscale and Data Center Connectivity with PAM4 SerDes Technology

Empowering AI, Hyperscale and Data Center Connectivity with PAM4 SerDes Technology
by Kalar Rajendiran on 07-25-2024 at 10:00 am

High Speed PAM4 SerDes Use Scenarios

The rapid expansion of data-intensive applications, such as artificial intelligence (AI), high-performance computing (HPC), and 5G, necessitates connectivity solutions capable of handling massive amounts of data with high efficiency and reliability. The advent of 224G/112G Serializer/Deserializer (SerDes) technology,… Read More


Cadence® Janus™ Network-on-Chip (NoC)

Cadence® Janus™ Network-on-Chip (NoC)
by Kalar Rajendiran on 07-23-2024 at 10:00 am

Design Flow when using Janus NoC

A Network-on-Chip (NoC) IP addresses the challenges of interconnect complexity in SoCs by significantly reducing wiring congestion and providing a scalable architecture. It allows for efficient communication among numerous initiators and targets with minimal latency and high speed. A NoC facilitates design changes, enabling… Read More


A New Class of Accelerator Debuts

A New Class of Accelerator Debuts
by Bernard Murphy on 07-22-2024 at 6:00 am

Chimera GPNPU Block diagram

I generally like to start my blogs with an application-centric viewpoint; what end-application is going to become faster, lower power or whatever because of this innovation? But sometimes an announcement defies such an easy classification because it is broadly useful. That’s the case for a recent release from Quadric, based… Read More


Blue Cheetah Advancing Chiplet Interconnectivity #61DAC

Blue Cheetah Advancing Chiplet Interconnectivity #61DAC
by Daniel Payne on 07-18-2024 at 10:00 am

blue cheetah 61dac min

At #61DAC, I love it when an exhibitor booth uses a descriptive tagline to explain what they do, like when the Blue Cheetah booth displayed Advancing Chiplet Interconnectivity. Immediately, I knew that they were an IP provider focusing on chiplets. I learned what sets them apart is how customizable their IP is to support specific… Read More