You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please,
join our community today!
WP_Term Object
(
[term_id] => 178
[name] => IP
[slug] => ip
[term_group] => 0
[term_taxonomy_id] => 178
[taxonomy] => category
[description] => Semiconductor Intellectual Property
[parent] => 0
[count] => 1818
[filter] => raw
[cat_ID] => 178
[category_count] => 1818
[category_description] => Semiconductor Intellectual Property
[cat_name] => IP
[category_nicename] => ip
[category_parent] => 0
[is_post] =>
)
I must say the ARM conference gets better every year, as do the attendance numbers. More than 4,000 people showed up including 5 SemiWiki bloggers, two of which I had not yet had the pleasure of meeting.
First I have to mention my favorite vendor booth. I don’t remember what company it was but the girls in fishnet stockings giving out… Read More
Internet of Thingsby Paul McLellan on 11-01-2012 at 8:10 pmCategories: Arm, IP
Another announcement from the Warren East’s ARM keynote this morning was the creation of a SIG within Weightless, which is an organization responsible for delivering royalty-free open standards to enable the Internet of Things (IoT). The SIG is focused on accelerating the adoption of Weightless as a wireless wide area… Read More
ARM and a LEGby Paul McLellan on 11-01-2012 at 5:09 pmCategories: Arm, IP
I went to Warren East’s keynote speech at ARM Techcon today. There had been some hints earlier in the week that some significant announcements would be made and, while they were not earth-shattering, I think that they will be significant in the long term.
One interesting thing that Warren pointed out is that the ARM partner… Read More
ARM TechCon Software and Systems Keynote: Why Ultra-Low Power Computing Will Change Everything Simon Segars, speaking of the importance of continuing low power initiatives, introduced Dr. Jonathan Koomey, Consulting Professor at Stanford. (First impression, our kind of guy: He wears engineer shoes, not sales shoes!)
Koomey… Read More
At CES 2011, Steven Sinofsky of Microsoft stepped on the stage and went off the map of proven Windows territory. Announcing the next version of Windows would support the ARM Architecture, including SoCs from Qualcomm, NVIDIA, and TI, set a new course for Microsoft.
But Windows, being the battleship-sized behemoth that it is, would… Read More
ARM 64-bitby Paul McLellan on 10-30-2012 at 6:56 pmCategories: Arm, IP
AMD announced yesterday that they would be building 64-bit ARM-based chips intended for use in servers. What was unclear is what the processors would be like. Although ARM had announced that they would move into 64-bit processors they didn’t have any that they had actually announced as being available for licensing.
At … Read More
They say what adds value is to take something difficult and make it look simple. USB looks so simple when it is done right, but designers know it can be one of the more tempermental features in an SoC, especially in the latest SuperSpeed incarnation.… Read More
Why making the difference between chips and cores, when mentioning that CEVA’s customers have shipped four billion IC to date? Because that can make a big difference! Imagine for example an IP vendor selling processor IP cores to be used in massively parallel computing application, when the chip maker create a processor NxM matrix,… Read More
The 2nd International Workshop on Resistive RAM. The workshop was the second installment of an annual series organized by Stanford University and the Belgian research institute Imec. Like most RRAM workshops, this year’s event featured talks focusing on the physics of RRAM devices and their underlying switching mechanism(s).… Read More
Introducing the first ReRAM-Forum movie!! In part 2 of their recently published papers in the Transactions on Electron Devices of the IEEE, Professor Ielmini’s group describe the modeling of resistive switching in bipolar metal oxide ReRAM. Like part 1, the paper is collaboration with David Gilmer of Sematech who provided the… Read More
Speculative Execution: Rethinking the Approach to CPU Scheduling