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iPhone 5: Boost to semiconductor market?

iPhone 5: Boost to semiconductor market?
by Bill Jewell on 09-25-2012 at 11:03 pm

The release of Apple’s iPhone 5 has led to much speculation on its impact on the economy. An analyst at J.P. Morgan estimated the iPhone 5 could add $3.2 billion to U.S. GDP in the fourth quarter, adding ¼ to ½ point to the GDP growth rate.

Analysts’ estimates for total iPhone sales in 4Q 2012 are in the range of 46 million to 50 million units.Read More


CEVA DSP Technology Symposium Series 2012

CEVA DSP Technology Symposium Series 2012
by Daniel Nenni on 09-25-2012 at 4:45 am

You are cordially invited to register to attend the CEVA DSP Technology Symposium Series 2012, which will take place in Taiwan, October 16th, China, October 18th and Israel, November 1st.

CEVA’s industry-leading experts and engineers will present a full day of lectures and seminars where you will learn about the latest technological… Read More


SAME 2012 Conference on October 2-3 in Sophia is coming soon!

SAME 2012 Conference on October 2-3 in Sophia is coming soon!
by Eric Esteve on 09-24-2012 at 11:01 am

This is the 15[SUP]th[/SUP] anniversary for the SAME Conference, dedicated to innovation on Microelectronics. Sophia-Antipolis is not only close to Mediterranean sea, but also at the heart of Telecom valley in south of France, with Texas Instruments design center dedicated to Application Processor design (OMAP), Cadence… Read More


Virtual Prototype your SoC including Arteris FlexNoC and optimize architecture using CPAK from Carbon

Virtual Prototype your SoC including Arteris FlexNoC and optimize architecture using CPAK from Carbon
by Eric Esteve on 09-21-2012 at 7:37 am

I have talked about Virtual Prototyping a SoC including FlexNoC Network on Chip IP from Arteris by using Carbon Design Systems set of tools in a previous post. A blog, posted on Carbon’ web, is clearly explaining the process to follow to optimize a fabric (FlexNoC) successively using the different tools from Carbon. Bill Neifert,… Read More


2nd International Workshop on Resistive RAM at Stanford

2nd International Workshop on Resistive RAM at Stanford
by Ed McKernan on 09-20-2012 at 8:02 pm

A Veritable who’s who of ReRAM researchers will be present at the 2nd International Workshop on Resistive RAM at Stanford in the beginning of October. Sponsored by IMEC and Stanford’s NMRTI (Non-Volatile Technology Research Initiative), the program features two days of talks, panel sessions and no doubt lots of… Read More


ReRAM Based Memory Buffers in SSDs

ReRAM Based Memory Buffers in SSDs
by Ed McKernan on 09-19-2012 at 11:40 am


In a paper at the VLSI meeting in Hawaii, Professor Ken Takeuchi described using an ReRAM buffer with an SSD. He points to some major performance gains that one can expect from such a configuration in terms of energy, speed and lifetime. Is this an opportunity for ReRAM that could spur development of the technology? Read more in a post… Read More


High Speed PHY Interfacing with SSIC, UFS or PCI express in Smartphone, Media tablet and Ultrabook at Lower Power

High Speed PHY Interfacing with SSIC, UFS or PCI express in Smartphone, Media tablet and Ultrabook at Lower Power
by Eric Esteve on 09-19-2012 at 10:54 am

We have recently commented the announcement from MIPI Alliance and PCI-SIG, allowing PCI Express to be used in martphone, Media tablet and Ultrabook, while keeping decent power consumption, compatible with these mobile devices. The secret sauce is in the High Speed SerDes function selected to interface with these high data Read More


ARM, Intel, Apple: It’s Mobile Week

ARM, Intel, Apple: It’s Mobile Week
by Paul McLellan on 09-14-2012 at 4:02 pm

As Dan wrote here, we got invited by Intel to IDF and by ARM to a cheeky little party that they organized the day before. I asked ARM if they were announcing anything and they said basically that it would be foolish to make any announcement the week of their biggest competitors big show. Well, that wasn’t a rule that Apple felt like… Read More


Cadence September News: strong IP and VIP focus

Cadence September News: strong IP and VIP focus
by Eric Esteve on 09-14-2012 at 4:25 am

There are three articles on the front page, in the September release of Cadence newsletter, all of them are dedicated to either IP (DDR4), VIP (NVM express VIP being used at Samsung) or Martin Lund. You can read Martin’s interview here and/or take a look at what I write about him this summer. This strong focus on IP, and in fact on Interface… Read More


Intel Finally Comes Clean on 22nm SoCs!

Intel Finally Comes Clean on 22nm SoCs!
by Daniel Nenni on 09-12-2012 at 7:00 pm

Ever since Intel announced that they will leverage their advanced process technology leadership into the mobile SoC market I have expressed my doubts. I know how Intel designs their microprocessors, having worked for many of their vendors over the years and having friends at Intel who are actually doing the work. Disclaimer: … Read More