Webinar PQC SemiwikiV4
WP_Term Object
(
    [term_id] => 178
    [name] => IP
    [slug] => ip
    [term_group] => 0
    [term_taxonomy_id] => 178
    [taxonomy] => category
    [description] => Semiconductor Intellectual Property
    [parent] => 0
    [count] => 1702
    [filter] => raw
    [cat_ID] => 178
    [category_count] => 1702
    [category_description] => Semiconductor Intellectual Property
    [cat_name] => IP
    [category_nicename] => ip
    [category_parent] => 0
    [is_post] => 
)

Current Embedded Memory Solutions Are Inadequate for 100G Ethernet

Current Embedded Memory Solutions Are Inadequate for 100G Ethernet
by Sundar Iyer on 10-01-2012 at 7:00 pm

With an estimated 7 billion connected devices, the demand for rich content, including video, games, and mobile apps is skyrocketing. Service providers around the globe are scrambling to transform their networks to satisfy the overwhelming demand for content bandwidth. Over the next few years, they will be looking to network… Read More


Toshiba’s ReRAM R&D Roadmap

Toshiba’s ReRAM R&D Roadmap
by Ed McKernan on 09-30-2012 at 11:00 pm

Most companies in the memory business have ReRAM on their radar if not their roadmaps. Toshiba have made some bullish comments about the roadmap and chip size for ReRAM at a recent R&D Strategies Update. At face value, the schedule would put Toshiba quite a bit ahead of their competitors. Over at ReRAM-Forum.com, we have done… Read More


Samsung going vertical Qualcomm cry CEVA laugh

Samsung going vertical Qualcomm cry CEVA laugh
by Eric Esteve on 09-27-2012 at 11:09 am

These last days have been full of Apple related stories; maybe it’s time to discuss a new topic? Like for example Samsung, direct competitor for Apple in the smartphone market, and take a look at the company move toward more vertical integration. Everybody working in the SC industry knows that Samsung is ranked #2 behind Intel, even… Read More


iPhone 5: Boost to semiconductor market?

iPhone 5: Boost to semiconductor market?
by Bill Jewell on 09-25-2012 at 11:03 pm

The release of Apple’s iPhone 5 has led to much speculation on its impact on the economy. An analyst at J.P. Morgan estimated the iPhone 5 could add $3.2 billion to U.S. GDP in the fourth quarter, adding ¼ to ½ point to the GDP growth rate.

Analysts’ estimates for total iPhone sales in 4Q 2012 are in the range of 46 million to 50 million units.Read More


CEVA DSP Technology Symposium Series 2012

CEVA DSP Technology Symposium Series 2012
by Daniel Nenni on 09-25-2012 at 4:45 am

You are cordially invited to register to attend the CEVA DSP Technology Symposium Series 2012, which will take place in Taiwan, October 16th, China, October 18th and Israel, November 1st.

CEVA’s industry-leading experts and engineers will present a full day of lectures and seminars where you will learn about the latest technological… Read More


SAME 2012 Conference on October 2-3 in Sophia is coming soon!

SAME 2012 Conference on October 2-3 in Sophia is coming soon!
by Eric Esteve on 09-24-2012 at 11:01 am

This is the 15[SUP]th[/SUP] anniversary for the SAME Conference, dedicated to innovation on Microelectronics. Sophia-Antipolis is not only close to Mediterranean sea, but also at the heart of Telecom valley in south of France, with Texas Instruments design center dedicated to Application Processor design (OMAP), Cadence… Read More


Virtual Prototype your SoC including Arteris FlexNoC and optimize architecture using CPAK from Carbon

Virtual Prototype your SoC including Arteris FlexNoC and optimize architecture using CPAK from Carbon
by Eric Esteve on 09-21-2012 at 7:37 am

I have talked about Virtual Prototyping a SoC including FlexNoC Network on Chip IP from Arteris by using Carbon Design Systems set of tools in a previous post. A blog, posted on Carbon’ web, is clearly explaining the process to follow to optimize a fabric (FlexNoC) successively using the different tools from Carbon. Bill Neifert,… Read More


2nd International Workshop on Resistive RAM at Stanford

2nd International Workshop on Resistive RAM at Stanford
by Ed McKernan on 09-20-2012 at 8:02 pm

A Veritable who’s who of ReRAM researchers will be present at the 2nd International Workshop on Resistive RAM at Stanford in the beginning of October. Sponsored by IMEC and Stanford’s NMRTI (Non-Volatile Technology Research Initiative), the program features two days of talks, panel sessions and no doubt lots of… Read More


ReRAM Based Memory Buffers in SSDs

ReRAM Based Memory Buffers in SSDs
by Ed McKernan on 09-19-2012 at 11:40 am


In a paper at the VLSI meeting in Hawaii, Professor Ken Takeuchi described using an ReRAM buffer with an SSD. He points to some major performance gains that one can expect from such a configuration in terms of energy, speed and lifetime. Is this an opportunity for ReRAM that could spur development of the technology? Read more in a post… Read More