Timing closure is the perennial issue in digital IC design. While the specific problem that has needed to be solved to achieve timing closure over the decades has continuously changed, it has always been a looming problem. And the timing closure problem has gotten more severe with 16/14nm FinFET SoCs due to greater distances between… Read More
Semiconductor Intellectual Property
AAPl Vs QCOM Who wins?
Things just got interesting in the iPhone supply chain with the $1B AAPL Vs QCOM legal action filed this week. For the life of me I could not understand why Apple second sourced the normally QCOM modem in the iPhone 7. It caused quite a stir in the technical community but we could only surmise that it was a price issue on the business side.… Read More
Qorvo and KeySight to Present on Managing Collaboration for Multi-site, Multi-vendor RF Design
Over the last several weeks I’ve been having a lot of discussions with colleagues around IP reuse and design data management. This led me to a discussion with Ranjit Adhikary, Marketing Vice President for ClioSoft.
ClioSoft is best known for their design collaboration software platform called SOS. They also sell an enterprise… Read More
DARPA Flex Logix and TSMC!
When I first saw emerging semiconductor IP company Flex Logix actively involved with TSMC I knew something big was coming and boy was I right. DARPA announced today that an agreement is in place with Flex Logix to develop EFLX eFPGA technology on TSMC 16FFC for use by companies or Government agencies designing chips for the US Government.… Read More
Technology Update With Andrew Faulkner and Jim Lipman of Sidense
Sidense is an interesting company in a very important market segment. Sidense was founded in 2004 and their 1T-OTP memory macros are now used in hundreds of chips from 180nm to 16nm for code storage, secure encryption keys, analog and sensor trimming and calibration, ID tags, and chip and processor configuration.
If you are designing… Read More
IP development strategy and hockey
One of the greatest hockey players of all time, Wayne Gretzky, provided a quote that has also been applied to the business world — “I skate to where the puck will be, not to where it has been.” It strikes me that this philosophy directly applies to IP development, as well. Engineering firms providing IP must anticipate… Read More
The Year of the eFPGA
The start of the new year is typically a time for annual predictions. Prognostications are especially difficult in our industry, due to the increasing difficulty in Moore’s Law technology scaling and greater design complexity challenges. There is one sure prediction, however — this year will see the emergence … Read More
Making the Move from 28nm to FinFET!
If you click FinFET in the SemiWiki.com Latest News: navigation bar at the top of this page you will get a list of 86 blogs that have been viewed more than 600,000 times. If you go to the last blogs on the list, meaning the first blogs to be published, you will see a three part series, “Introduction to FinFET Technology” written by Tom Dillinger… Read More
Netspeed Gemini NoC Provides Coherent Fabric in Mobileye’s Next-generation EyeQ5 SoC
Last week I wrote about NetSpeed’s network on chip (NoC) IP technology and design environment NocStudio. This week we see a real life application of this technology announced at CES by Imagination Technologies and NetSpeed. The companies have announced that Mobileye will use Imagination and NetSpeed IP in their next-generation… Read More
Analog Bits and TSMC!
As a long time semiconductor IP professional I can tell you for a fact that it is one of the most challenging segments of semiconductor design. Given the growing criticality of semiconductor IP, the challenges of being a leading edge IP provider are increasing and may be at a breaking point. The question now is: What does it take to … Read More
Musk’s new job as Samsung Fab Manager – Can he disrupt chip making? Intel outside