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Xilinx
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Secret to Beating Your FPGA Competitor’s Design

Secret to Beating Your FPGA Competitor’s Design
by Luke Miller on 05-17-2014 at 6:00 am
Categories: FPGA, Xilinx

Can I ask you a personal question dear reader? It is only fair, you know so much about me and all, so here goes… Why are you still hand coding you’re FPGA design? Surely you are not hand coding interfaces, like PCie, SRIO, DDR, GbE, JESD204B, HMC etc… Correct? OK, why then are you still hand coding the guts of the world’s best, super-duper… Read More

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More knowledge, less time in FPGA-based prototyping

More knowledge, less time in FPGA-based prototyping
by Don Dingee on 04-29-2014 at 4:00 pm
Categories: EDA, FPGA, Synopsys, Xilinx

I recently published a post on LinkedIn titled “Sometimes, you gotta throw it all out” in reference to the innovation process and getting beyond good to better. A prime example has crossed my desk: the new ProtoCompiler software for Synopsys HAPS FPGA-based prototyping systems.

Last week, I spoke with Troy Scott, product marketing… Read More

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Xilinx Quarterly Results: 20nm Prototypes

Xilinx Quarterly Results: 20nm Prototypes
by Paul McLellan on 04-29-2014 at 5:07 am
Categories: FPGA, Xilinx

Xilinx announced their quarterly results last week. Because of their financial year not being aligned with their calendar year this is actually 4th quarter of their 2014 financial year. New Year’s Eve 2015 comes early for Xilinx. The results were very good. As Moshe Gavrielov, the CEO, said on the conference call:Xilinx… Read More

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Xilinx Showcases Worlds First ‘High Performance’ Analogue FPGA

Xilinx Showcases Worlds First ‘High Performance’ Analogue FPGA
by Luke Miller on 04-16-2014 at 7:00 am
Categories: FPGA, Xilinx

Last February Xilinx presented a prototype device at the 2014 IEEE international Solid-State Circuits Conference (ISSCC, titled “A Heterogeneous 3D-IC Consisting of Two 28nm FPGA Die and 32 Reconfigurable High-Performance Data Converters” and click here to get a copy of the paper. Let me just share the intro my dear reader… … Read More

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Xilinx and Red Pitaya is Tootie Fruity

Xilinx and Red Pitaya is Tootie Fruity
by Luke Miller on 04-03-2014 at 12:00 pm
Categories: FPGA, Xilinx

Xilinx’s Zynq SoC is the best selling FPGA of all time. Zynq has brought together, at first an uncomfortable but necessary mix of software and hardware engineers. Two very different but special kind of people. Me, I’m of the hardware persuasion. Zynq is the start of the much needed open FPGA community. This will drive down the price… Read More

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Top 10 Reasons to Use Vivado Design Suite

Top 10 Reasons to Use Vivado Design Suite
by Paul McLellan on 03-23-2014 at 7:05 am
Categories: FPGA, Xilinx

Here are the top 10 reasons to use the Xilinx Vivado Design Suite to design your All Programmable Devices:

Reason number 10: Accelerate verification by over 100XThe Vivado Design Suite System Edition lets you do design at the C, C++ or systemC level. But a side-benefit is that you can use these languages for verification at performances… Read More

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Aldec the leader in DO254

Aldec the leader in DO254
by Luke Miller on 03-19-2014 at 12:00 pm
Categories: Aldec, EDA, FPGA, Xilinx

I am convinced after studying out the matter, that Aldec is one of the leaders in DO254 certification. As you listen and read the news as I do about flight MA-370, you keep theorizing and wondering. This is a good time to introduce the reader to the seriousness of flight worthy electronics and the arduous process to achieve certification.… Read More

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Xilinx’s UltraScale vs Arria 10 – Non dolet, Paete

Xilinx’s UltraScale vs Arria 10 – Non dolet, Paete
by Luke Miller on 03-18-2014 at 9:30 pm
Categories: FPGA, Xilinx

The DSP48E2 (I do not come up with these names… Could have named it a multiplier thingy) in the Xilinx 20nm UltraScale family (I do not come up with these names… Could of named it Virtex-8, or Luke-8) is simply amazing. Today was good, as I began playing with UltraScale tools and seeing how the DSP checks out. I also encourage you to check… Read More

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Xilinx & Apache Team up for FPGA Reliability at 20nm

Xilinx & Apache Team up for FPGA Reliability at 20nm
by Pawan Fangaria on 03-17-2014 at 12:00 am
Categories: Ansys, Inc., EDA, FPGA, Xilinx

In this age of SoCs with hundreds of IPs from different sources integrated together and working at high operating frequencies, FPGA designers are hard pressed keeping up the chip reliability from issues arising out of excessive static & dynamic IR drop, power & ground noise, electro migration and so on. While the IPs are… Read More

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Getting 3D TV from 2D Content

Getting 3D TV from 2D Content
by Daniel Payne on 03-14-2014 at 7:28 pm
Categories: EDA, FPGA, Xilinx

3D TV has been all the rage over the past few years because of the added realism it offers the viewer, but there’s really not that much content that you can stream or play on a Blu-ray device. Wouldn’t it be cool if there was a box that could create 3D on the fly from a 2D stream or Blu-ray? This week I discovered that such a box… Read More