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Mentor Graphics User2User Conference

Mentor Graphics User2User Conference
by glforte on 04-05-2013 at 1:06 pm


April 25, 2013, San Jose, CA

Click here to register.

Come hear Mentor Graphics CEO, Wally Rhines, 2013 Kaufman Award Winner,Chenming Hu, and Xilinx Senior VP,Victor Peng, at the User2User Conference in San Jose.

KEYNOTES
Organizing by Design
9:00am – 9:50am
Walden C. Rhines | CEO & Chairman | Mentor Graphics
Winning products… Read More


For power and performance, Fins or BOXes?

For power and performance, Fins or BOXes?
by Beth Martin on 04-05-2013 at 12:50 pm

I recently spoke to Arvind Narayanan, Product Marketing Manager for Mentor’s place and route division about emerging technology. This of course led to FinFETS, FDSOI, performance, power, and cost-benefit. The battle between FDSOI and FinFETs, said Narayanan, is going to be something to watch.

Both FDSOI and FinFET technologies… Read More


Power integrity: ground, and other fairy tales

Power integrity: ground, and other fairy tales
by Don Dingee on 03-31-2013 at 8:30 pm

Ground. It’s that little downward-pointing triangle that somehow works miracles on every schematic. It looks very simple until one has to tackle modern power distribution network (PDN) design on a board with high speed and high power draw components, and you soon discover ground is a complicated fairy tale with a lot of influences.… Read More


Mentor at TSMC Technology Symposium

Mentor at TSMC Technology Symposium
by glforte on 03-29-2013 at 11:41 am

TSMC will host their annual technology symposium at several locations in the U.S. on April 9th in San Jose, April 16th in Austin, and April 23rd in Boston. TSMC will discuss the market outlook, design enablement, and technology for high-speed computing, mobile communications, connectivity and storage, CIS, embedded flash, … Read More


New ways for High Frequency Analysis of IC Layouts

New ways for High Frequency Analysis of IC Layouts
by Pawan Fangaria on 03-25-2013 at 5:30 pm

Amidst frequently changing requirements, time pressure and demand for high accuracy, it is imperative that EDA and design companies look at time consuming processes in the overall design flow and find alternatives without losing accuracy. High Frequency Analysis of IC designs is one such process which is traditionally based… Read More


Wally Rhines, Victor Peng and Chenming Hu to Speak at Mentor User2User Conference

Wally Rhines, Victor Peng and Chenming Hu to Speak at Mentor User2User Conference
by glforte on 03-20-2013 at 10:29 am

This year’s Mentor Graphics user group meeting, User2User, will be held at the DoubleTree by Hilton in San Jose, California on April 25, 2013. The featured keynote presenters include…

  • Dr. Walden C. Rhines, CEO and Chairman of Mentor Graphics, talking about “Organizing by Design”
  • Victor Peng, Senior VP, Xilinx presenting on “The
Read More

EDAC CEOs: consolidation, clouds, and whether Intel will buy Synopsys

EDAC CEOs: consolidation, clouds, and whether Intel will buy Synopsys
by Paul McLellan on 03-15-2013 at 5:12 pm

Yesterday evening was the annual EDAC CEO forecast meeting. Actually it is not really a forecast meeting any more, more a sort of CEO response to some survey questions asked of EDAC members. Rich Valera of Needham moderated with Lip-Bu, Aart and Wally, along with Simon Segars representing the IP arm(!) of the business and Raul Camposano… Read More


IJTAG for IP Test: a free seminar

IJTAG for IP Test: a free seminar
by Beth Martin on 03-14-2013 at 1:53 pm

What: Better IP Test with IJTAG
When: 26 March, 2013, 10:30am-1:30pm
Where: Mentor Graphics, 46871 Bayside Parkway, Fremont, CA 94538


If you are involved in IC test*, you’ve probably heard about the IEEE P1687 standard, called IJTAG for ‘internal’ JTAG. IJTAG defines a standard for embedded IP that includes simple… Read More


Standard Cell Library Characterization

Standard Cell Library Characterization
by Daniel Payne on 03-13-2013 at 1:01 pm

Standard cell library characterization has been around for decades, Synopsys has been offering Liberty NCXand Cadence has Virtuoso Foundation IP Characterization. What’s new is that Mentor Graphics acquired the Z Circuit technology for library characterization and has integrated it with the Eldo Classic circuit … Read More


Verification the Mentor Way

Verification the Mentor Way
by Paul McLellan on 03-05-2013 at 3:05 pm

During DVCon I met with Steve Bailey to get an update on Mentor’s verification. They were also announcing some new capabilities. I also attended Wally Rhines keynote (primarily about verification of course, since this was DVCon; I blogged about that here) and the Mentor lunch (it was pretty much Mentor all day for me) on the… Read More