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Electronic Design Automation
More than two years ago, Synopsys launched its AI-driven design space optimization (DSO.ai) capability. It is part of the company’s Synopsys.ai EDA suite, an outcome of its overarching AI initiative. Since then, DSO.ai has boosted designer productivity and has been leveraged for 270 production tape-outs. DSO.ai uses machine… Read More
ViShare Technology, a fabless semiconductor company focusing on video codec, developed a chip for 8K60 video streaming with the help of S2C FPGA-based prototyping solution. This solution enables ViShare to accelerate its verification process and time-to-market by 6 months.
Since its establishment in 2012, ViShare has been… Read More
I have historically avoided mixed signal topics, assuming they decouple from digital and can be left to the experts. That simple view no longer holds water. Analog and digital are becoming more closely linked through control loops and datapaths, requiring a careful balancing act in verification between performance, accuracy… Read More
The Brazilian Ministry of Science and Technology (MCTIC) has a research unit, Renato Archer Information Technology Center (CTI), and two of their IC engineers presented at the MunEDA User Group meeting this May on the topic of designing Latching Current Limiter (LCL) circuits for space applications with RHBD (radiation-hardened… Read More
We have shown in the “Design IP Report” 2022 that the market share of the wired Interface IP category is a growing part of the total IP, and that this trend is confirmed year after year. The interface IP category has moved from 18% share in 2017 to 25% in 2022.
During the 2010-decade, smartphone was the strong driver for the IP industry,… Read More
The automotive industry is undergoing a remarkable transformation, with vehicles becoming more connected, automated, and reliant on software. While these advancements promise convenience, comfort and efficiency to the consumers, the nature and complexity of the technologies also raise concerns for functional safety … Read More
Assertion based verification only catches problems for which you have written assertions. Is there a complementary approach to find problems you haven’t considered – the unknown unknowns? Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now… Read More
I had read a little about Easy-Logic before #60DAC, so this meeting on Wednesday in Moscone West was my first in-person meeting with Jimmy Chen and Kager Tsai to learn about their EDA tools and where they fit into the overall IC design flow. A Functional Engineering Change Order (ECO) is a way to revise an IC design by updating the smallest… Read More
Ethernet’s continual adaptation to meet the demands of a data-rich, interconnected world can be credited to the two axes along which its evolution has been propelled. The first axis emphasizes Ethernet’s role in enabling precise and reliable control over interconnected systems. As industries embrace automation… Read More
The various algorithms that comprise artificial intelligence (AI) are finding their way into the chip design flow. What is driving a lot of this work is the complexity explosion of new chip designs required to accelerate advanced AI algorithms. It turns out AI is both the problem and the solution in this case. AI can be used to cut … Read More
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Disaggregating LLM Inference: Inside the SambaNova Intel Heterogeneous Compute Blueprint