I spoke with Anna again at the Chiplet Summit this week, we had previously spoken at DAC 2023. MZ is short for Monozukuri which is a Japanese term that translates to “making things” or “manufacturing.” In a broader sense, it refers to the art, science, and craftsmanship of creating products which fit chiplets quite well.
Anna Fontanelli has more than 25 years of expertise in managing complex R&D organizations/programs to give birth to innovative EDA technologies. Fontanelli is an expert in IC/package co-design and led Monozukuri in the launch of GENIO, bringing a holistic design environment for 2D, 2.5D and 3D multi-component systems.
Tell us a little bit about yourself and your company.
I’m the Founder and CEO of Monozukuri, S.pA. who takes its products and services to market under MZ Technologies brand. Our mission is to conquer 2.5D & 3D design challenges by delivering innovative, ground-breaking EDA software solutions and methodologies. Our technology redefines the co-design of heterogeneous microelectronic systems by providing an improved level of automation in three-dimensional interconnect optimization.
What was the most exciting high point of 2023 for your company?
We reached a huge milestone when an internationally respected System/ASIC company adopted our GENIOTM 1.7 fully-integrated EDA co-design tool. They adopted a full-suite license and are targeting a next generation product family based on heterogeneous advanced system-in-package technology.
What was the biggest challenge your company faced in 2023?
People. We are moving into a global expansion and are finding the availability of business development and account service pros who truly understand the needs of the marketplace are few and far between. We’re looking for people who are technically-sophisticated and sufficiently business savvy to help advanced technology IC companies take on their challenges.
How is your company’s work addressing this biggest challenge?
We’re recruiting like crazy. We’re reaching out to industry contacts and we’re advertising on EDA websites.
What do you think the biggest growth area for 2024 will be, and why?
Clearly, Heterogeneous die integration challenges are going to do nothing but increase this year. Yield, cost of design, and time-to-market are going to become paramount.
How is your company’s work addressing this growth?
We’re going to address some of most vexing advanced systems challenges: Helping designers deliver energy-efficiency improvement … that is performance per mW … and latency reduction. We’re enabling a design approach that integrates signal and power integrity with thermal analysis for simulation-aware system interconnect optimization. This will allow technology-aware architecture exploration, 3D floor planning and system interconnect optimization to enable early up feasibility analysis without starting any physical implementation.
What conferences did you attend in 2023 and how was the traffic?
We attended DAC, where we had some very good exploratory meetings and we presented papers at DATE and the IEEE EDAPS 2023 Hybrid Conference. We’re not really worried about a lot of traffic per se. We offer a very specific value proposition, so the quality of the attendance is more important than the quantity.
Will you attend conferences in 2024? Same or more?
We’ll more than likely add Chiplet Summit to our conference attendance.
Additional questions or final comments?
2024 going to be all about chiplets, packaging and systems integration. The most demanding IC systems today combine multiple components such as chiplets, memory and ASICs. The package poses the challenge of handling, updating & optimizing complex interconnects in a 3D space. Present-day 3D chiplet architecture demands die stacking and silicon-to-silicon vertical communications capabilities using a mix-and-match “LEGO-like” assembly. This new chiplet packaging requires new tools, new methodologies, and new flows.