1198773726 EDA SemiWiki banner ads 3D IC800x100
WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 3789
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 3789
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
    [is_post] => 
)
EDA

Electronic Design Automation

Posted on

Dawn at the OASIS, Dusk for GDSII

Dawn at the OASIS, Dusk for GDSII
by Beth Martin on 03-28-2011 at 1:53 pm
Categories: EDA, Siemens EDA

For an industry committed to constant innovation, changes in any part of the design flow are only slowly adopted, and only when absolutely necessary. Almost 10 years ago, it became clear that shrinking process technologies would bring a massive growth of layout and mask data—rougly 50% per node. This avalanche of data seriously… Read More

Posted on

Process Design Kits: PDKs, iPDKs, openPDKs

Process Design Kits: PDKs, iPDKs, openPDKs
by Paul McLellan on 03-24-2011 at 5:28 pm
Categories: Cadence, Foundries, GlobalFoundries, TSMC

One of the first things that needs to be created when bringing up a new process is the Process Design Kit, or PDK. Years ago, back when I was running the custom IC business line at Cadence, we had a dominant position with the Virtuoso layout editor and so creating a PDK really meant creating a Virtuoso PDK, and it was a fairly straightforward… Read More

Posted on

Evolution of Lithography Process Models, Part II

Evolution of Lithography Process Models, Part II
by Beth Martin on 03-24-2011 at 3:56 pm
Categories: EDA, Siemens EDA

In part I of this series, we looked at the history of lithography process models, starting in 1976. Some technologies born in that era, like the Concorde and the space shuttle, came to the end of their roads. Others did indeed grow and develop, such as the technologies for mobile computing and home entertainment. And lithography … Read More

Posted on

Hardware Configuration Management and why it’s different than Software Configuration Management

Hardware Configuration Management and why it’s different than Software Configuration Management
by Daniel Payne on 03-23-2011 at 2:51 pm
Categories: Cadence, Cliosoft, EDA

Intro
On Friday I talked with Srinath Anantharaman by phone to gain some perspective on Hardware Configuration Management (HCM) versus Software Configuration Management (SCM), especially as it applies to the IC design flows in use today. In the 1990’s we both worked at Viewlogic in Fremont, CA and in 1997 Srinath founded… Read More

Posted on

RTL Power Analysis and Verification

RTL Power Analysis and Verification
by Paul McLellan on 03-22-2011 at 11:13 am
Categories: EDA

“Power is the new timing” has almost become a cliché. There are a number of reasons for this, not least that increasingly it is power rather than anything else that caps the performance that a given system can deliver. Power is obviously very important in portable applications such as smartphones because it shows through directly… Read More

Posted on

Apache files S-1

Apache files S-1
by Paul McLellan on 03-14-2011 at 3:50 pm
Categories: Ansys, Inc., EDA

Apache Design Solutions today filed their S-1 with the SEC in preparation for its initial public offering (IPO). This is a big deal since there hasn’t been an IPO of an EDA company for may years (Magma was the last 10 years ago). As a private company they have not had to reveal their financials until now.

It turns out that they did… Read More

Posted on

Getting Real Time Calibre DRC Results

Getting Real Time Calibre DRC Results
by Daniel Payne on 03-10-2011 at 10:00 am
Categories: EDA, Siemens EDA

Last week I met with Joseph Davis, Ph.D. at Mentor Graphics in Wilsonville, Oregon to learn about a new product designed for full-custom IC layout designers to improve productivity.

The traditional flow for full-custom IC layout designers has been nearly unchanged for decades:

  • Read a schematic or use Schematic Driven Layout
… Read More
Posted on

TSMC 2011 Technology Symposium Theme Explained

TSMC 2011 Technology Symposium Theme Explained
by Daniel Nenni on 03-09-2011 at 6:49 pm
Categories: EDA, Foundries, TSMC

The 17[SUP]th[/SUP] Annual TSMC Technology Symposium will be held in San Jose California on April 5[SUP]th[/SUP], 2011. Dr. Morris Chang will again be the keynote speaker. The theme this year is “Trusted Technology and Capacity Provider”and I think it’s important to not only hear what people are saying but also understand why… Read More

Posted on

Mentor Graphics 1 : Carl Icahn 0!

Mentor Graphics 1 : Carl Icahn 0!
by Daniel Nenni on 03-04-2011 at 10:03 pm
Categories: EDA

This is just another blog about Carl Icahn and his quest to conquer EDA, when in fact EDA is conquering him. It includes highlights from my dinner with Mentor Graphics and Physicist Brian Greene, the Mentor Q4 conference call, and meeting Mentor CEO Wally Rhines at DvCon 2011.

It wasn’t just the free food this time, dinner with Brian… Read More

Posted on

Clock Domain Crossing, a potted history

Clock Domain Crossing, a potted history
by Paul McLellan on 03-03-2011 at 11:23 am
Categories: EDA

Yesterday I talked to Shaker Sarwary, the senior product director for Atrenta’s clock-domain crossing (CDC) product SpyGlass-CDC. I asked him how it came about. The product was originally started nearly 8 years ago, around the time Atrenta itself got going. Shaker got involved about 5 years ago.

Originally this was a small… Read More