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Workload-tuned cores seeing greater interest

Workload-tuned cores seeing greater interest
by Don Dingee on 06-30-2013 at 10:00 pm

Is it possible to design a processor with very high performance and low power consumption? To answer that, embedded illuminati are now focusing on designs tuned to specific workloads – creating a tailored processor that does a few things very efficiently, with nothing extra.… Read More


Today’s Program is Brought To You by the Letter A

Today’s Program is Brought To You by the Letter A
by Paul McLellan on 06-28-2013 at 9:09 pm

What do nVidia, Freescale and GlobalFoundries have in common? They are semiconductor companies? They are ARM licensees? They are doing 28nm chips? They all have the letter ‘a’ in their names?

All true, but that’s not what I was thinking of. But the letter ‘a’ is a clue since Apache (and Ansys) begin with ‘a’. All three companies have… Read More


Design Test and Regression Management of SoCs

Design Test and Regression Management of SoCs
by Daniel Payne on 06-28-2013 at 2:26 pm

Eric Peersfounded Missing Link tools in 2008 and his company was acquiredby Methodics in 2012, so I met with him at DAC to understand how their EDA tools for Design, Test and Regression Management are used in an SoC design.


Eric Peers, MethodicsRead More


HW Prototyping and HLS at DAC

HW Prototyping and HLS at DAC
by Daniel Payne on 06-28-2013 at 12:20 pm

I love it when EDA companies send their engineers to DAC because I learn more of the unvarnished truth about their products. I met with Bill Thomas of Aldec to get an update on their HW prototyping boards, then two NEC engineers to learn about High Level Synthesis.

HW Prototyping

Bill Thomas, Research Engineer at Aldec
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Validating Hard IP & Std Cell Libraries at DAC

Validating Hard IP & Std Cell Libraries at DAC
by Daniel Payne on 06-27-2013 at 3:13 pm

The building blocks for every SoC are standard cell libraries that are assembled, designed and verified together. But how do we really know if all the data formats used during design are correct and consistent? To answer that question I spoke with Johan Peetersof Fractal Technologiesat DAC.


Johan Peeters, Rene Donkers
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