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Electronic Design Automation
Yes, it is that time of year again, DAC is coming and it is in San Francisco so you can bet we will break attendance records, absolutely. I would like to call on ALL semiconductor IP companies to exhibit this year. IP is the center of the semiconductor design universe, DAC is the premier semiconductor design event, and San Francisco … Read More
It is that time of year and once again Atrenta has produced a video wishing you all the best for the holiday season. They are so spread around the world it is not just Hanukkah and Christmas but the Asian Lunar New Year (end of January) and probably some more holidays I don’t even know about. Last year there was a competition to name… Read More
Formal approaches and security are a perfect match since you really want to prove that there are no holes in your security, rather than just being fairly confident. At the recent Jasper User Group meeting, Victor Purri presented some case studies in security verification.
The Jasper Security Path Verification (SPV) App is used… Read More
High Definition Multimedia Interface (HDMI) is today part of our day to day life, at home as well as at our office we are using devices integrating HDMI ports. HDMI penetration is well illustrated by this picture (created in Dec. 2011 by In-Stat): from DTV to Game console, the devices belong to the Consumer Electronics market segments,… Read More
Mentor is acquiring Oasys, subject to all the usual caveats about shareholder and regulatory approval. The shareholder paperwork went out earlier this week. The common stock is valueless so presumably the price is low (and Mentor historically has not paid high prices for its acquisitions).
So what is going to happen with the technology?… Read More
Our popular smart phones have a whole slew of RF-based radios in them for: Bluetooth, WiFi, LTE, GSM, NFC. Using just a single clock frequency for a DSP function or SoC is a thing of the past, so the design of multirate systems is here to stay. So now the challenge on the design and verification side is to use a methodology that supports:… Read More
I attended the 3D packaging conference in Burlingame this week. The most interesting presentation to me was by Bryan Black of AMD. He argued very convincingly that Moore’s Law is basically over for the PC microprocessor business and the way forward is going to be 3D. AMD are clearly working on all this.
Increased density and… Read More
Interconnect plays a significant role in the semiconductor design of a SoC; if not architected and handled well, it can lead to an overdesigned SoC impacting on its power, performance and area. Since a SoC generally contains multiple IPs requiring different data paths to satisfy varying latency and performance cycles, it has … Read More
Jim Feldhan, President of Semico Research presented earlier this month at the Impact Conference on the topic: Focus on the IP Ecosystem. I’ve reviewed his 19 page presentation, and summarize it with:
Donald Rumsfeld categorized what we knew into known unknowns and unknown unknowns. In a chip design, those unknown unknowns can bite you and leave you with a non-functional design, perhaps even intermittent failures which can be among the hardest problems to debug.
Chips are too big to do any sort of full gate-level simulation,… Read More
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