Banner Electrical Verification The invisible bottleneck in IC design updated 1
WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 4329
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 4329
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
    [is_post] => 
)

ARM and Mentor Enabling the Ecosystem for the Backbone of IoT

ARM and Mentor Enabling the Ecosystem for the Backbone of IoT
by Daniel Nenni on 06-24-2016 at 7:00 am

Charlene Marini (VP of ARM Segment Marketing) did a nice presentation at the ARM/Mentor Summit last month at the Mentor HQ in Fremont. I just got the slides so let me give you a quick summary from my notes. It was a very good presentation on IoT and emulation which in my mind is the new simulation. I also attended an IoT panel at #53DAC that… Read More


Bridging the Gap between Foundry and IC Design at #53DAC

Bridging the Gap between Foundry and IC Design at #53DAC
by Daniel Payne on 06-23-2016 at 12:00 pm

In our semiconductor ecosystem we often specialize the engineers and therefore EDA tools into separate silos like Foundry, front-end design, back-end design, tapeout, etc. What I discovered at #53DAC a few weeks ago was that some EDA companies actually bridge the gap between foundry engineers and IC designers with their tools.… Read More


NVIDIA Extends Their Datacenter Performance Lead In Neural Network Computing

NVIDIA Extends Their Datacenter Performance Lead In Neural Network Computing
by Patrick Moorhead on 06-23-2016 at 7:00 am

At NVIDIA’s GPU Technology Conference (GTC) 2016 in San Jose, California the company announced products based on their latest GPU architecture, code-named Pascal. This conference is traditionally attended by some of the leading researchers in GPU-accelerated compute technologies and over the past few years has become increasingly… Read More


Semiconductor IP QA Standards Get a Boost at #53DAC

Semiconductor IP QA Standards Get a Boost at #53DAC
by Daniel Payne on 06-22-2016 at 12:00 pm

At the #53DAC earlier this month held in Austin, Texas I met up with Renee Donkers, the founder of Fractal Technologies. His company has been focused on improving the quality of semiconductor IP cells through the use of automated checking software. The highest area of growth in EDA as measured by the ESD Alliance is in the reusable… Read More


IBM Fires a Shot at Intel with its Latest POWER Roadmap

IBM Fires a Shot at Intel with its Latest POWER Roadmap
by Alan Radding on 06-22-2016 at 7:00 am

In case you worry that IBM will abandon hardware in the pursuit of its strategic initiatives focusing on cloud, mobile, analytics and more; well, stop worrying. With the announcement of its POWER Roadmap at the OpenPOWER Summitearlier this spring, it appears POWER will be around for years to come. But IBM is not abandoning the strategicRead More


TMR approaches should vary by FPGA type

TMR approaches should vary by FPGA type
by Don Dingee on 06-20-2016 at 4:00 pm

We’ve introduced the concepts behind triple modular redundancy (TMR) before, using built-in capability in Synopsys Synplify Premier to synthesize TMR circuitry into FPGAs automatically. A recent white paper authored by Angela Sutton revisits the subject… Read More


IC Designers talk about 28nm to 7nm challenges at #53DAC

IC Designers talk about 28nm to 7nm challenges at #53DAC
by Daniel Payne on 06-20-2016 at 12:00 pm

IC design challenges are different at advanced nodes like 7nm, so to learn more about the topic I attended a panel luncheon at DAC sponsored by Cadence. The moderator was both funny and technically astute, quite the rare combination, so kudos to Professor Rob Rutenbar, a former Neolinear guy now at the University of Illinois. Panelists… Read More


AMD’s 7th Generation APU Brings Many Performance Tweaks And The Last Hurrah Before Zen

AMD’s 7th Generation APU Brings Many Performance Tweaks And The Last Hurrah Before Zen
by Patrick Moorhead on 06-17-2016 at 4:00 pm

Advanced Micro Devices has already told us that 2016 was going to be the year of graphics, but the reality is that they also have a lot going on in their CPU and APU division as well. In fact, in addition to Advanced Micro Devices’s newly announced 7th Generation APUs in 2016, the company is also expected to launch their new Zen CPU cores… Read More


Custom IC Layout Design at #53DAC

Custom IC Layout Design at #53DAC
by Daniel Payne on 06-17-2016 at 12:00 pm

Last week at the #53DAC conference there was a lot of excitement in the air about custom IC design, especially at the luncheon that I attended on Tuesday from Synopsys where they had customers like STMicroelectronics, GSI Technology, Samsung Foundry and the Synopsys IP group talk about their experiences using the new Custom Compiler… Read More


Design for the System Age

Design for the System Age
by Bernard Murphy on 06-17-2016 at 7:00 am

Of late, it has become painfully obvious that the value of electronics is in the system. And since systems demand continuing improvement, increasing performance and decreasing cost (once partially guaranteed by semiconductor process advances) is now sought through algorithm advances – witness the Google TPU and custom… Read More