Like many people, I have been adding automation to my home, and the number of connected devices I use has slowly but steadily increased. These include light bulbs, cameras, switches, a thermostat, a voice assistant, etc. Between them, they know when I am home or away, and have the ability to record images and sound. In addition to … Read More
Electronic Design Automation
PSS and Reuse: Great Solution But Not Hands-Free
If you’re new to PSS you could be forgiven for thinking that it automagically makes stimulus reusable, vertically from IPs to systems, horizontally between derivatives and between hardware-based and software-based testing. From a big-picture point of view these are certainly all potential benefits of PSS.
What PSS does provide… Read More
Silvaco Talks Atoms to Systems – Where to Next?
At the ES Design West event in San Francisco last week Silvaco’s CTO and EVP of Products, Babak Taheri, gave a presentation titled, “Next Generation SoC Design: From Atoms to Systems”. The time slot for the talk was only 30-minutes which is simply not enough to discuss all the technology Silvaco is providing now. I had not looked closely… Read More
WEBINAR: Eliminating Hybrid Verification Barriers Through Test Suite Synthesis
I’ve been following the evolution of the verification space for a very long time including several stints consulting to formal verification companies. It has always been interesting to me to see how so many diverse verification techniques emerge and been used, but without much unification of the approaches. With the emergence… Read More
HBM or CDM ESD Verification – You Need Both
In the realm of ESD protection, Charged Device Model (CDM) is becoming the biggest challenge. Of course, Human Body Model (HBM) is still essential, and needs to be used when verifying chips. However, a number of factors are raising the potential losses that CDM events can cause relative to HBM. These factors fall into two categories:… Read More
Konica Minolta Talks About High-Level Synthesis using C++
In the early days of chip design circa 1970’s the engineers would write logic equations, then manually reduce that logic using Karnaugh Maps. Next, we had the first generation of logic synthesis in the early 1980’s, which read in a gate-level netlist, performed logic reduction, then output a smaller gate-level netlist.… Read More
WEBINAR: GPU-Powered SPICE – The Way Forward for Analog Simulation
Several years ago, I was a consultant to a company called Gauda, Inc. I enjoyed working with Gauda as the technology was interesting. On June 3, 2014, Gauda, Inc. was acquired by D2S, Inc. so their technology lives on. Gauda was focused on optical proximity correction (OPC) and optical proximity verification solutions utilizing… Read More
Smart Hearing is Heating Up
A lot of the attention in intelligent systems is on object detection in still or video images but there’s another very active area, in smart audio. Amazon and Google smart speakers may be the best-known applications but there are more obvious (and perhaps less novelty-driven) applications in enhancing the hearing devices we already… Read More
Automotive Market Pushing Test Tool Capabilities
It’s easy to imagine that the main impetus for automotive electronics safety standards like ISO 26262 is the emergence of autonomous driving technology. However, even cars that do not offer this capability rely heavily on electronics for many critical systems. These include engine control, braking, crash sensors, and stability… Read More
Early IP Block Error Detection is Critical!
The rising complexity of modern SoC designs, as enabled by progressing manufacturing technology, leads to an increasing validation challenge as the only way to manage complexity increase is by re-using more pre-designed IP blocks. These IP-blocks are provided by various suppliers such as a foundry partner, internal design… Read More


The Quantum Threat: Why Industrial Control Systems Must Be Ready and How PQShield Is Leading the Defense