Banner Electrical Verification The invisible bottleneck in IC design updated 1
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Why Generative AI for Chip Design is a Game Changer

Why Generative AI for Chip Design is a Game Changer
by Daniel Nenni on 05-22-2023 at 10:00 am

Efabless AI Generated Design Challenge SemiWiki 1

AI-generated chip design is progressing at an incredible pace!

Earlier this week, I wrote about the Efabless AI Generated Open–Source Silicon Design Challenge.  If you haven’t done so already, take a closer look at the challenge and see first-hand what this is all about.  In talking to Mike Wishart and Mohamed Kassem, co-founders… Read More


An SDK for an Advanced AI Engine

An SDK for an Advanced AI Engine
by Bernard Murphy on 05-22-2023 at 6:00 am

Chimera SDK

I have observed before that the success of an AI engine at the edge rests heavily on the software interface to drive that technology. Networks trained in the cloud need considerable massaging to optimize for smaller and more specialized edge devices. Moreover, an AI task at the edge depends on a standalone pipeline demanding a mix… Read More


Opinions on Generative AI at CadenceLIVE

Opinions on Generative AI at CadenceLIVE
by Bernard Murphy on 05-18-2023 at 6:00 am

Generative AI

According to some AI dreamers, we’re almost there. We’ll no longer need hardware or software design experts—just someone to input basic requirements from which fully realized system technologies will drop out the other end. Expert opinions in the industry are enthusiastic but less hyperbolic. Bob O’Donnell, president, founder… Read More


Join the AI Generated Open-Source Silicon Design Challenge!

Join the AI Generated Open-Source Silicon Design Challenge!
by Daniel Nenni on 05-16-2023 at 10:00 am

Join the AI Generated Open Source Silicon

As we all know design starts are the life blood of the semiconductor industry, both big and small. Enabling those design starts is what the semiconductor ecosystem is all about and Efabless has a very unique value proposition in this regard.

Efabless is a free cloud-based chip design platform, growing community of 9000+ chip designers,… Read More


Emerging Stronger from the Downturn

Emerging Stronger from the Downturn
by Kalar Rajendiran on 05-16-2023 at 6:00 am

Full Flow from HL Synthesis through to GDSII Accelerates the creation of AI IP

It was refreshing to hear a talk focused on emerging stronger from the downturn when the news and media are focused on the gloom. At the recent Siemens EDA User2User conference, Joe Sawicki, executive vice president, IC, gave an uplifting keynote talk to the audience. He highlighted a secular growth trend happening in the semiconductor… Read More


Takeaways from CadenceLIVE 2023

Takeaways from CadenceLIVE 2023
by Bernard Murphy on 05-11-2023 at 6:00 am

Takeways image

Given popular fascination it seems impossible these days to talk about anything other than AI. At CadenceLIVE, it was refreshing to be reminded that the foundational methods on which designs of any type remain and will always be dominated in all aspects of engineering by deep, precise, and scalable math, physics, computer science… Read More


Is Your Interconnect Strategy Scalable?

Is Your Interconnect Strategy Scalable?
by Bernard Murphy on 05-09-2023 at 6:00 am

Design min

“Strategy” is a word sometimes used loosely to lend an aura of visionary thinking, but in this context, it has a very concrete meaning. Without a strategy, you may be stuck with decisions you made on a first-generation design when implementing follow-on designs. Or face major rework to correct for issues you hadn’t foreseen. Making… Read More


Alphawave Semi Showcases 3nm Connectivity Solutions and Chiplet-Enabled Platforms for High Performance Data Center Applications

Alphawave Semi Showcases 3nm Connectivity Solutions and Chiplet-Enabled Platforms for High Performance Data Center Applications
by Daniel Nenni on 05-04-2023 at 6:00 am

Alphawave Semi 3nm Eye Diagram

There were quite a few announcements at the TSMC Technical Symposium last week but the most important, in my opinion, were based on TSMC N3 tape-outs. Not only is N3 the leading 3nm process it is the only one in mass production which is why all of the top tier semiconductor companies are using it. TSMC N3 will be the most successful node… Read More


Anirudh Keynote at Cadence Live

Anirudh Keynote at Cadence Live
by Bernard Murphy on 05-02-2023 at 6:00 am

IMG 0064

Anirudh is an engaging speaker with a passion for technology. Acknowledging the sign of the times, he sees significant value-add in AI but reminded us that it is a still supporting actor in system design and other applications where star roles will continue to be played by computational software that’s founded in hard science, … Read More


TSMC 2023 North America Technology Symposium Overview Part 1

TSMC 2023 North America Technology Symposium Overview Part 1
by Daniel Nenni on 04-26-2023 at 6:00 pm

Advanced Technology Roadmap

The TSMC 2023 North America Technology Symposium happened today so I wanted to start writing about it as there is a lot to cover. I will do summaries and other bloggers will do more in-depth coverage on the technology side in the coming weeks. Having worked in the fabless semiconductor ecosystem the majority of my 40 year semiconductor… Read More