WP_Term Object
(
    [term_id] => 497
    [name] => Arteris
    [slug] => arteris
    [term_group] => 0
    [term_taxonomy_id] => 497
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 154
    [filter] => raw
    [cat_ID] => 497
    [category_count] => 154
    [category_description] => 
    [cat_name] => Arteris
    [category_nicename] => arteris
    [category_parent] => 178
    [is_post] => 
)
            
Arteris logo bk org rgb
WP_Term Object
(
    [term_id] => 497
    [name] => Arteris
    [slug] => arteris
    [term_group] => 0
    [term_taxonomy_id] => 497
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 154
    [filter] => raw
    [cat_ID] => 497
    [category_count] => 154
    [category_description] => 
    [cat_name] => Arteris
    [category_nicename] => arteris
    [category_parent] => 178
    [is_post] => 
)

Smart TV Chipset: 4 Key Takeaways from Interconnect IP

Smart TV Chipset: 4 Key Takeaways from Interconnect IP
by Majeed Ahmad on 01-26-2016 at 4:00 pm

The ultra high-definition (UHD) or 4K TV hardware is leading to insanely powerful chipsets in the age of Netflix, and that is taking the system-on-chip (SoC) design to a whole new level of complexity. Take the case of Samsung’s new chipset for SUHD TVs that boasts more than 100 IP interfaces.

Here, apart from the usual suspects… Read More


How Wireless Modem IP is Aiding Roadmap to 5G Chipsets

How Wireless Modem IP is Aiding Roadmap to 5G Chipsets
by Majeed Ahmad on 12-22-2015 at 4:00 pm

The semiconductor industry is steadily charting its course toward 5G chipsets with the availability of extremely complex system-on-chip (SoC) designs that support the surge of data traffic over next-generation wireless networks. Take Blu Wireless Technology, for instance, the IP supplier from Britain that is using the Arteris… Read More


Interconnect Watch: 3 Chip Design Merits for Network Applications

Interconnect Watch: 3 Chip Design Merits for Network Applications
by Majeed Ahmad on 10-21-2015 at 4:00 pm

The countdown to the end of Moore’s Law is coinciding with the rising complexity in system-on-chip (SoC) designs. And that’s not a mere coincidence. The leverage that has long been coming from shrinking process nodes in terms of cost, performance and power benefits is now increasingly being accomplished through… Read More


Optimizing Quality-of-Service in a Network-on-Chip Architecture

Optimizing Quality-of-Service in a Network-on-Chip Architecture
by Tom Dillinger on 10-13-2015 at 12:00 pm

The Linley Group is well-known for their esteemed Microprocessor Report publication, now in its 28th year. Accompanying their repertoire of industry reports, TLG also sponsors regular conferences, highlighting the latest developments in processor architecture and implementation.

One of the highlights of the conference… Read More


SSD Storage Chips: Basic Interconnect Considerations

SSD Storage Chips: Basic Interconnect Considerations
by Majeed Ahmad on 07-31-2015 at 4:00 pm

The joint development of 3D XPoint memory technology from Intel and Micron has once more brought the spotlight on data centers and chips for solid-state drives (SSDs). The two semiconductor industry giants claim that 3D XPoint memory is1,000 times faster than NAND Flash: the underlying memory content for SSDs. Such developments… Read More


Is Interconnect Ready for the Post-mobile SoCs?

Is Interconnect Ready for the Post-mobile SoCs?
by Majeed Ahmad on 06-28-2015 at 2:00 pm

The interconnect technology is one of the unsung heroes of the system-on-chip (SoC) revolution. It’s the on-chip networking fabric that is used to link various IP cores on an SoC floorplan. The technology facilitates links between multiple processors, on-chip memories, hardware accelerators and more. In other words,… Read More


Automating Timing Closure Using Interconnect IP, Physical Information

Automating Timing Closure Using Interconnect IP, Physical Information
by Majeed Ahmad on 04-29-2015 at 1:00 pm

Timing closure is a “tortoise” for some system-on-chip (SoC) designers just the way many digital guys call RF design a “black art”. Chip designers often tell horror stories of doing up to 20 back-end physical synthesis place & route (SP&R) iterations with each iteration taking a week or more. “Timing closure”, a largely… Read More


Rockchip Bets on Arteris FlexNoC Interconnect IP to Leapfrog SoC Design

Rockchip Bets on Arteris FlexNoC Interconnect IP to Leapfrog SoC Design
by Majeed Ahmad on 04-19-2015 at 9:00 am

China was a virgin territory for Arteris Inc. before July 19, 2012 when Fuzhou Rockchip Electronics announced that it has licensed the Arteris FlexNoC network-on-chip (NoC)-based interconnect IP technology for its multicore SoCs for budget Android tablets. Rockchip mostly targets the tablet and set-top box (STB) markets … Read More


Arteris Flexes Networking Muscle in TI’s Multi-standard IoT Chip

Arteris Flexes Networking Muscle in TI’s Multi-standard IoT Chip
by Majeed Ahmad on 03-14-2015 at 7:00 am

Arteris Inc., a network-on-chip (NoC) interconnect IP solution provider, has joined hands with Texas Instruments Inc. to create an ultra-low-power chip that helps Internet of Things (IoT) devices go battery-less with energy harvesting and support coin cell-powered IoT operation for multiple years.

Another low-power MCU… Read More


Sonics vs Arteris Lawsuit Update!

Sonics vs Arteris Lawsuit Update!
by Daniel Nenni on 02-27-2015 at 3:00 pm

As strange as it may seem one of my hobbies is reading case law. It’s not only interesting to see what the human race is really up to, it is also good to know your rights in regards to things like defamation, especially when you are a New Media mogul like myself. Some of the funnier defamation cases are called “Twibel” as in libel on Twitter.… Read More