Synopsys: now in 3D

Synopsys: now in 3D
by Paul McLellan on 03-26-2012 at 8:00 am

And no red and green glasses required.

I remember the first time I heard about a Through Silicon Via (TSV), punching a hole through the entire wafer to make an electrical connection at the back, like we do all the time in printed circuit boards with through plated holes. I thought someone was trying one on and trying to make me look a fool.… Read More


Singapore honors Lip-Bu Tan

Singapore honors Lip-Bu Tan
by Paul McLellan on 03-25-2012 at 11:08 pm

Lip-Bu Tan, the CEO of Cadence, has been named by the Singapore Business Awards as Outstanding CEO (overseas) last week. These awards were launched in 1985 by the Business Times and DHL, so this year is the 27th year of the award, created to recognize business leaders in Singapore and abroad.

As it happens, Cadence flew me first class… Read More


EDPS Monterey

EDPS Monterey
by Paul McLellan on 03-17-2012 at 8:00 am

Every year in Monterey is a relatively small conference that looks at the design process, EDPS, the electronic design process symposium. I gave a keynote there a couple of years ago, but you don’t have to listen to me this time. The keynotes are from:

  • 1st day: Misha Buric, CTO of Altera, talking about SoC FPGAs and other things
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Double Patterning and Then The End of Lithography

Double Patterning and Then The End of Lithography
by Paul McLellan on 03-15-2012 at 8:00 am

I went to a couple more sessions at the Common Platform Technology Forum today, on 20nm double patterning and whatever will we do at 14nm. Basically, this is the end of planar transistors and the end of optical lithography. One session was by IBM scientists about process and one by Michael White of Mentor about double patterning. … Read More


Common Platform: Onward to the Future

Common Platform: Onward to the Future
by Paul McLellan on 03-14-2012 at 3:03 pm

There were keynotes from all three semiconductor partners in the Common Platform Alliance and, as if to show how common they are, they all talked about the problems that need to be addressed in the next decade and a half and they all said pretty much the same thing. Gary Patton of IBM went first and so he got to say everything first. Plus,… Read More


CDNLive: the Keynotes

CDNLive: the Keynotes
by Paul McLellan on 03-13-2012 at 2:24 pm

There were three keynotes at CDNLive this morning, and one theme ran through them: collaboration. In fact there was one specific instance of collaboration that all three people mentioned. Taping out an ARM Cortex-A15 in TSMC 20nm technology using a Cadence tool flow.

Lip-Bu, Cadence’s CEO, went first. He had some numbers… Read More


Power Issues for Chip and Board: webinar

Power Issues for Chip and Board: webinar
by Paul McLellan on 03-10-2012 at 4:24 pm

Last month Brian Bailey at EDN moderated an interesting webinar about power issues. Unusually, it combined two different domains: doing things by modeling and actually taking measurements off real chips and boards. The two participants were Arvind Shanmugavel from the Apache subsidiary of Ansys, and Randy White from Tektronix.… Read More


Common Platform Technology Forum: Peering into the Future

Common Platform Technology Forum: Peering into the Future
by Paul McLellan on 03-10-2012 at 9:00 am

Next Wednesday is the Common Platform Technology Forum. “Common Platform” is a name that only a committee could have come up with, giving no clue as to what it actually is. As you probably know, there are various process clubs sharing the costs of technology development (TD) and one of them consists of IBM, Samsung and… Read More


Elpida and Japan Inc

Elpida and Japan Inc
by Paul McLellan on 03-09-2012 at 2:17 pm

Last week, the Japanese memory company Elpida filed for bankruptcy. There is worldwide overcapacity in DRAM and somebody had to go. Its strength and the weakness was that it was much more outward facing than most of the Japanese semiconductor and electronic industry. So it had to compete globally and wasn’t up to the task.… Read More


Formale Verifikation in München

Formale Verifikation in München
by Paul McLellan on 03-08-2012 at 9:00 am

With DATE next week in Dresden, all eyes turn to Germany. Not to be left out, Jasper has a seminar on formal verification coming up on March 19th in the Kempinski Hotel at Munich airport. Unlike most “airport” hotels the Kempinski is indeed right in the heart of the airport. And for those of us who like a good German beer,… Read More