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Blogs have limited wordcount so insert your own generic opening paragraph here about the importance of low power in IC design. Mention IoT and cloud datacenters for extra credit.
It is well-known that the biggest reductions in power come from changes at the architectural level. Tools and process can do some things and since they… Read More
It was way back in 2001 that Pat Gelsinger, then CTO of Intel, pointed out that if we kept increasing clock rates that chips would have the power density of rocket nozzles and nuclear reactor cores. Ever since then power has been public enemy #1 in chip design. In 2007 Apple announced the iPhone and the application processor inside … Read More
Today the non-volatile memory (NVM) foundation is the eFuse. It is typically available for free from the foundry and is the default choice because, like Mount Everest, it is there. However, like Mount Everest it is big. It is also power hungry and slow. eFuse solutions blow the silicide on the poly line creating a change in resistance.… Read More
SEMICON West is coming up July 14-16th. As always it is in San Francisco at the Moscone Center. Why should you go? Because SEMICON West attracts more than 30,000 professional attendees representing the leading global technology companies, including IDMs, foundries, fabless, contract packaging and test houses, OEMs, materials… Read More
Once again there is a Heart of Technology event at DAC. It is the Love IP Party on Monday evening. Full details at the end of this entry, but first a bit of context. Heart of Technology was started by Jim Hogan who probably doesn’t need much introduction to anyone who has worked in EDA for any length of time.
I met with Jim, along with… Read More
Because it is such a major impact on the semiconductor industry, being the largest and fastest growing market ever, I follow the ups and down of the mobile industry. So what happened in Q1?
Total shipments are up 2% to a record (for Q1) 440 million units but that is down 16% from Q4 which remains the biggest quarter ever.
First thing is… Read More
At the TSMC Technology Symposium last month Suk Lee presented a lot of information on design enablement. Suk is an interesting guy with a unique background in ASIC, Semiconductor, EDA, and now Foundry. In baseball terms that would be like playing infield, outfield, home plate, and umpire!
Around the turn of the millennium Suk actually… Read More
One of the trickiest tasks in designing a modern SoC is getting the clock tree(s) right. The two big reasons for this:
Last week was the Linley Mobile Conference. Mobile is a huge semiconductor market and, outside of Intel, is the main driver for next generation process technologies. A new generation of mobile phones comes along, fills the leading edge fabs for a year or two and then moves on to the next generation. Nothing comes close to requiring… Read More
How is that for a cryptic title? It is GlobalFoundries’ rallying cry. Their big focus is to bring up 14nm during 2015 in fab 8 in Malta NY.
Last week I chatted to Shubhankar Basu. He is the senior product line manager for leading edge technologies. Not surprisingly, that means he is currently leading the 14nm FinFET business. He told… Read More
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Facing the Quantum Nature of EUV Lithography